From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752858AbcAFSyk (ORCPT ); Wed, 6 Jan 2016 13:54:40 -0500 Received: from terminus.zytor.com ([198.137.202.10]:54894 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751998AbcAFSyh (ORCPT ); Wed, 6 Jan 2016 13:54:37 -0500 Date: Wed, 6 Jan 2016 10:53:56 -0800 From: tip-bot for Harish Chegondi Message-ID: Cc: acme@redhat.com, lukasz.anaczkowski@intel.com, tglx@linutronix.de, peterz@infradead.org, eranian@google.com, hpa@zytor.com, harish.chegondi@intel.com, mingo@kernel.org, andi.kleen@intel.com, jolsa@redhat.com, harish.chegondi@gmail.com, vincent.weaver@maine.edu, torvalds@linux-foundation.org, kan.liang@intel.com, linux-kernel@vger.kernel.org Reply-To: torvalds@linux-foundation.org, vincent.weaver@maine.edu, harish.chegondi@gmail.com, linux-kernel@vger.kernel.org, kan.liang@intel.com, peterz@infradead.org, acme@redhat.com, tglx@linutronix.de, lukasz.anaczkowski@intel.com, andi.kleen@intel.com, jolsa@redhat.com, hpa@zytor.com, eranian@google.com, harish.chegondi@intel.com, mingo@kernel.org In-Reply-To: <872e8ef16cfc38e5ff3b45fac1094e6f1722e4ad.1449470704.git.harish.chegondi@intel.com> References: <872e8ef16cfc38e5ff3b45fac1094e6f1722e4ad.1449470704.git.harish.chegondi@intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset Git-Commit-ID: dae25530a44ad9e6523495ebc8b37bb0a1640490 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: dae25530a44ad9e6523495ebc8b37bb0a1640490 Gitweb: http://git.kernel.org/tip/dae25530a44ad9e6523495ebc8b37bb0a1640490 Author: Harish Chegondi AuthorDate: Mon, 7 Dec 2015 14:32:31 -0800 Committer: Ingo Molnar CommitDate: Wed, 6 Jan 2016 11:15:37 +0100 perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset Call uncore_pci_box_ctl() function to get the PMON box control MSR offset instead of hard coding the offset. This would allow us to use this snbep_uncore_pci_init_box() function for other PCI PMON devices whose box control MSR offset is different from SNBEP_PCI_PMON_BOX_CTL. Signed-off-by: Harish Chegondi Signed-off-by: Peter Zijlstra (Intel) Cc: Andi Kleen Cc: Arnaldo Carvalho de Melo Cc: Harish Chegondi Cc: Jiri Olsa Cc: Kan Liang Cc: Linus Torvalds Cc: Lukasz Anaczkowski Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/872e8ef16cfc38e5ff3b45fac1094e6f1722e4ad.1449470704.git.harish.chegondi@intel.com Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c index f2ddfcc..bfb9656 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c @@ -315,8 +315,9 @@ static u64 snbep_uncore_pci_read_counter(struct intel_uncore_box *box, struct pe static void snbep_uncore_pci_init_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; + int box_ctl = uncore_pci_box_ctl(box); - pci_write_config_dword(pdev, SNBEP_PCI_PMON_BOX_CTL, SNBEP_PMON_BOX_CTL_INT); + pci_write_config_dword(pdev, box_ctl, SNBEP_PMON_BOX_CTL_INT); } static void snbep_uncore_msr_disable_box(struct intel_uncore_box *box)