From: tip-bot for Borislav Petkov <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: mingo@kernel.org, tony.luck@intel.com, luto@amacapital.net,
peterz@infradead.org, tglx@linutronix.de,
torvalds@linux-foundation.org, brgerst@gmail.com, hpa@zytor.com,
linux-kernel@vger.kernel.org, bp@suse.de, bp@alien8.de,
dvlasenk@redhat.com
Subject: [tip:ras/core] x86/mce: Add the missing memory error check on AMD
Date: Tue, 24 Nov 2015 01:31:35 -0800 [thread overview]
Message-ID: <tip-db548a28fcee0f38cf4c7c726becf24c8afacf02@git.kernel.org> (raw)
In-Reply-To: <1448350880-5573-4-git-send-email-bp@alien8.de>
Commit-ID: db548a28fcee0f38cf4c7c726becf24c8afacf02
Gitweb: http://git.kernel.org/tip/db548a28fcee0f38cf4c7c726becf24c8afacf02
Author: Borislav Petkov <bp@suse.de>
AuthorDate: Tue, 24 Nov 2015 08:41:19 +0100
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100
x86/mce: Add the missing memory error check on AMD
We simply need to look at the extended error code when detecting
whether the error is of type memory.
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Tony Luck <tony.luck@intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1448350880-5573-4-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/mcheck/mce.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index fb8b1db..e00e85a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -522,10 +522,10 @@ static bool memory_error(struct mce *m)
struct cpuinfo_x86 *c = &boot_cpu_data;
if (c->x86_vendor == X86_VENDOR_AMD) {
- /*
- * coming soon
- */
- return false;
+ /* ErrCodeExt[20:16] */
+ u8 xec = (m->status >> 16) & 0x1f;
+
+ return (xec == 0x0 || xec == 0x8);
} else if (c->x86_vendor == X86_VENDOR_INTEL) {
/*
* Intel SDM Volume 3B - 15.9.2 Compound Error Codes
next prev parent reply other threads:[~2015-11-24 9:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-24 7:41 [PATCH 0/4] RAS stuff for tip:x86/ras Borislav Petkov
2015-11-24 7:41 ` [PATCH 1/4] x86/mce: Do not enter deferred errors into the generic pool twice Borislav Petkov
2015-11-24 9:30 ` [tip:ras/core] " tip-bot for Tony Luck
2015-11-24 7:41 ` [PATCH 2/4] x86/RAS: Remove mce.usable_addr Borislav Petkov
2015-11-24 9:31 ` [tip:ras/core] " tip-bot for Borislav Petkov
2015-11-24 7:41 ` [PATCH 3/4] x86/mce: Add the missing memory error check on AMD Borislav Petkov
2015-11-24 9:31 ` tip-bot for Borislav Petkov [this message]
2015-11-24 7:41 ` [PATCH 4/4] x86/mce: Make usable address checks Intel-only Borislav Petkov
2015-11-24 9:31 ` [tip:ras/core] " tip-bot for Borislav Petkov
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