From: tip-bot for Andi Kleen <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: tglx@linutronix.de, ak@linux.intel.com, mingo@kernel.org,
hpa@zytor.com, peterz@infradead.org,
torvalds@linux-foundation.org, linux-kernel@vger.kernel.org
Subject: [tip:perf/core] perf/x86/intel/lbr: Use correct index to save/ restore LBR_INFO with call stack
Date: Tue, 4 Aug 2015 01:59:26 -0700 [thread overview]
Message-ID: <tip-e0573364b8c5b17401569ef581f1625803210f4d@git.kernel.org> (raw)
In-Reply-To: <1432786398-23861-5-git-send-email-andi@firstfloor.org>
Commit-ID: e0573364b8c5b17401569ef581f1625803210f4d
Gitweb: http://git.kernel.org/tip/e0573364b8c5b17401569ef581f1625803210f4d
Author: Andi Kleen <ak@linux.intel.com>
AuthorDate: Wed, 27 May 2015 21:13:17 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 4 Aug 2015 10:16:59 +0200
perf/x86/intel/lbr: Use correct index to save/restore LBR_INFO with call stack
Use the correct index to save/restore the LBR_INFO_x MSR in
callstack mode. This is more a cleanup, as even with the wrong
index the register was correctly saved/restored, and also
LBR callgraph mode in perf tools do not really need anything in
LBR_INFO. But still better to use the right index.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@kernel.org
Cc: eranian@google.com
Cc: jolsa@redhat.com
Link: http://lkml.kernel.org/r/1432786398-23861-5-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index b432c47..a5bc424 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -245,7 +245,7 @@ static void __intel_pmu_lbr_restore(struct x86_perf_task_context *task_ctx)
wrmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);
wrmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);
if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)
- wrmsrl(MSR_LBR_INFO_0 + i, task_ctx->lbr_info[i]);
+ wrmsrl(MSR_LBR_INFO_0 + lbr_idx, task_ctx->lbr_info[i]);
}
task_ctx->lbr_stack_state = LBR_NONE;
}
@@ -268,7 +268,7 @@ static void __intel_pmu_lbr_save(struct x86_perf_task_context *task_ctx)
rdmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);
rdmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);
if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)
- rdmsrl(MSR_LBR_INFO_0 + i, task_ctx->lbr_info[i]);
+ rdmsrl(MSR_LBR_INFO_0 + lbr_idx, task_ctx->lbr_info[i]);
}
task_ctx->lbr_stack_state = LBR_VALID;
}
next prev parent reply other threads:[~2015-08-04 9:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-28 4:13 Andi Kleen
2015-05-28 4:13 ` [PATCH 1/5] x86, perf: Allow time stamp for free running PEBSv3 Andi Kleen
2015-08-04 8:56 ` [tip:perf/core] perf/x86/intel/lbr: " tip-bot for Andi Kleen
2015-05-28 4:13 ` [PATCH 2/5] x86, perf: Add option to disable reading branch flags/cycles Andi Kleen
2015-06-15 10:48 ` Peter Zijlstra
2015-05-28 4:13 ` [PATCH 3/5] perf, tools: Disable branch flags/cycles for lbr call graph Andi Kleen
2015-05-28 4:13 ` [PATCH 4/5] x86, perf: Use correct index to save/restore LBR_INFO with callstack Andi Kleen
2015-08-04 8:59 ` tip-bot for Andi Kleen [this message]
2015-05-28 4:13 ` [PATCH 5/5] x86, perf: Limit LBR accesses to TOS in callstack mode Andi Kleen
2015-08-04 8:59 ` [tip:perf/core] perf/x86/intel/lbr: " tip-bot for Andi Kleen
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