[tip:perf/pebs] perf, x86: Avoid double disable on throttle vs ioctl(PERF_IOC_DISABLE)

tip-bot for Peter Zijlstra
2010-03-10T13:22:56Z

Commit-ID: cc7f00820b2f3be656569c41158d9323e425bcfe
Gitweb: http://git.kernel.org/tip/cc7f00820b2f3be656569c41158d9323e425bcfe
Author: Peter Zijlstra <a.p.zijlstra@chello.nl>
AuthorDate: Mon, 8 Mar 2010 17:51:33 +0100
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Wed, 10 Mar 2010 13:23:36 +0100

perf, x86: Avoid double disable on throttle vs ioctl(PERF_IOC_DISABLE)

Calling ioctl(PERF_EVENT_IOC_DISABLE) on a thottled counter would result
in a double disable, cure this by using x86_pmu_{start,stop} for
throttle/unthrottle and teach x86_pmu_stop() to check ->active_mask.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: paulus@samba.org
Cc: eranian@google.com
Cc: robert.richter@amd.com
Cc: fweisbec@gmail.com
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/kernel/cpu/perf_event_intel_ds.c | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index e7ac517..a7401e4 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -461,7 +461,6 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
}

static int intel_pmu_save_and_restart(struct perf_event *event);
-static void intel_pmu_disable_event(struct perf_event *event);

static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)
{
@@ -528,7 +527,7 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)
regs.flags &= ~PERF_EFLAGS_EXACT;

if (perf_event_overflow(event, 1, &data, &regs))
- intel_pmu_disable_event(event);
+ x86_pmu_stop(event);

out:
intel_pmu_pebs_enable_all();
@@ -603,7 +602,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
regs.flags &= ~PERF_EFLAGS_EXACT;

if (perf_event_overflow(event, 1, &data, &regs))
- intel_pmu_disable_event(event);
+ x86_pmu_stop(event);
}
out:
intel_pmu_pebs_enable_all();