Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support to use NMI-safe methods

Ingo Molnar
2009-06-15T18:24:33Z

* Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> wrote:

> Hrm, would it be possible to save the c2 register upon nmi handler
> entry and restore it before iret instead ? This would ensure a
> nmi-interrupted page fault handler would continue what it was
> doing with a non-corrupted cr2 register after returning from nmi.
>
> Plus, this involves no modification to the page fault handler fast
> path.

I guess this kind of nesting would work too - assuming the cr2 can
be written to robustly.

And i suspect CPU makers pull off a few tricks to stage the cr2 info
away from the page fault entry execution asynchronously, so i'd not
be surprised if writing to it uncovered unknown-so-far side-effects
in CPU implementations.

If possible i wouldnt want to rely on such a narrowly possible hack
really - any small change in CPU specs could cause problems years
down the line.

The GUP based method is pretty generic though - and can be used on
other architectures as well. It's not as fast as direct access
though.

Ingo