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From: "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: dave.hansen@intel.com, akpm@linux-foundation.org,
	torvalds@linux-foundation.org, brgerst@gmail.com,
	luto@kernel.org, mingo@kernel.org, peterz@infradead.org,
	kirill.shutemov@linux.intel.com, mhocko@suse.com, bp@alien8.de,
	jpoimboe@redhat.com, arnd@arndb.de, linux-kernel@vger.kernel.org,
	dvlasenk@redhat.com, tglx@linutronix.de, hpa@zytor.com
Subject: [tip:x86/mm] x86/mm: Extend headers with basic definitions to support 5-level paging
Date: Tue, 14 Mar 2017 02:37:13 -0700	[thread overview]
Message-ID: <tip-fe1e8c3e9634071ac608172e29bf997596d17c7c@git.kernel.org> (raw)
In-Reply-To: <20170313143309.16020-2-kirill.shutemov@linux.intel.com>

Commit-ID:  fe1e8c3e9634071ac608172e29bf997596d17c7c
Gitweb:     http://git.kernel.org/tip/fe1e8c3e9634071ac608172e29bf997596d17c7c
Author:     Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
AuthorDate: Mon, 13 Mar 2017 17:33:04 +0300
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 14 Mar 2017 08:45:07 +0100

x86/mm: Extend headers with basic definitions to support 5-level paging

This patch extends x86 headers to enable 5-level paging support.

It's still based on <asm-generic/5level-fixup.h>. We will get to the
point where we can have <asm-generic/pgtable-nop4d.h> later.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20170313143309.16020-2-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/pgtable-2level_types.h |  1 +
 arch/x86/include/asm/pgtable-3level_types.h |  1 +
 arch/x86/include/asm/pgtable.h              | 26 ++++++++++++++++++++-----
 arch/x86/include/asm/pgtable_64_types.h     |  1 +
 arch/x86/include/asm/pgtable_types.h        | 30 ++++++++++++++++++++++++++++-
 5 files changed, 53 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/pgtable-2level_types.h b/arch/x86/include/asm/pgtable-2level_types.h
index 3925764..373ab1d 100644
--- a/arch/x86/include/asm/pgtable-2level_types.h
+++ b/arch/x86/include/asm/pgtable-2level_types.h
@@ -7,6 +7,7 @@
 typedef unsigned long	pteval_t;
 typedef unsigned long	pmdval_t;
 typedef unsigned long	pudval_t;
+typedef unsigned long	p4dval_t;
 typedef unsigned long	pgdval_t;
 typedef unsigned long	pgprotval_t;
 
diff --git a/arch/x86/include/asm/pgtable-3level_types.h b/arch/x86/include/asm/pgtable-3level_types.h
index bcc8962..b8a4341 100644
--- a/arch/x86/include/asm/pgtable-3level_types.h
+++ b/arch/x86/include/asm/pgtable-3level_types.h
@@ -7,6 +7,7 @@
 typedef u64	pteval_t;
 typedef u64	pmdval_t;
 typedef u64	pudval_t;
+typedef u64	p4dval_t;
 typedef u64	pgdval_t;
 typedef u64	pgprotval_t;
 
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 1cfb36b..6f6f351 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -179,6 +179,17 @@ static inline unsigned long pud_pfn(pud_t pud)
 	return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
 }
 
+static inline unsigned long p4d_pfn(p4d_t p4d)
+{
+	return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
+}
+
+static inline int p4d_large(p4d_t p4d)
+{
+	/* No 512 GiB pages yet */
+	return 0;
+}
+
 #define pte_page(pte)	pfn_to_page(pte_pfn(pte))
 
 static inline int pmd_large(pmd_t pte)
@@ -770,6 +781,16 @@ static inline int pud_large(pud_t pud)
 }
 #endif	/* CONFIG_PGTABLE_LEVELS > 2 */
 
+static inline unsigned long pud_index(unsigned long address)
+{
+	return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
+}
+
+static inline unsigned long p4d_index(unsigned long address)
+{
+	return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
+}
+
 #if CONFIG_PGTABLE_LEVELS > 3
 static inline int pgd_present(pgd_t pgd)
 {
@@ -788,11 +809,6 @@ static inline unsigned long pgd_page_vaddr(pgd_t pgd)
 #define pgd_page(pgd)		pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
 
 /* to find an entry in a page-table-directory. */
-static inline unsigned long pud_index(unsigned long address)
-{
-	return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
-}
-
 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
 {
 	return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
index 3a26420..0b2797e 100644
--- a/arch/x86/include/asm/pgtable_64_types.h
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -13,6 +13,7 @@
 typedef unsigned long	pteval_t;
 typedef unsigned long	pmdval_t;
 typedef unsigned long	pudval_t;
+typedef unsigned long	p4dval_t;
 typedef unsigned long	pgdval_t;
 typedef unsigned long	pgprotval_t;
 
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index 6248433..df08535 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -272,9 +272,20 @@ static inline pgdval_t pgd_flags(pgd_t pgd)
 	return native_pgd_val(pgd) & PTE_FLAGS_MASK;
 }
 
-#if CONFIG_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 4
+
+#error FIXME
+
+#else
 #include <asm-generic/5level-fixup.h>
 
+static inline p4dval_t native_p4d_val(p4d_t p4d)
+{
+	return native_pgd_val(p4d);
+}
+#endif
+
+#if CONFIG_PGTABLE_LEVELS > 3
 typedef struct { pudval_t pud; } pud_t;
 
 static inline pud_t native_make_pud(pmdval_t val)
@@ -318,6 +329,22 @@ static inline pmdval_t native_pmd_val(pmd_t pmd)
 }
 #endif
 
+static inline p4dval_t p4d_pfn_mask(p4d_t p4d)
+{
+	/* No 512 GiB huge pages yet */
+	return PTE_PFN_MASK;
+}
+
+static inline p4dval_t p4d_flags_mask(p4d_t p4d)
+{
+	return ~p4d_pfn_mask(p4d);
+}
+
+static inline p4dval_t p4d_flags(p4d_t p4d)
+{
+	return native_p4d_val(p4d) & p4d_flags_mask(p4d);
+}
+
 static inline pudval_t pud_pfn_mask(pud_t pud)
 {
 	if (native_pud_val(pud) & _PAGE_PSE)
@@ -461,6 +488,7 @@ enum pg_level {
 	PG_LEVEL_4K,
 	PG_LEVEL_2M,
 	PG_LEVEL_1G,
+	PG_LEVEL_512G,
 	PG_LEVEL_NUM
 };
 

  reply	other threads:[~2017-03-14  9:41 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-13 14:33 [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 Kirill A. Shutemov
2017-03-13 14:33 ` [PATCH 1/6] x86/mm: Extend headers with basic definitions to support 5-level paging Kirill A. Shutemov
2017-03-14  9:37   ` tip-bot for Kirill A. Shutemov [this message]
2017-03-13 14:33 ` [PATCH 2/6] x86/mm: Convert trivial cases of page table walk to " Kirill A. Shutemov
2017-03-14  9:37   ` [tip:x86/mm] " tip-bot for Kirill A. Shutemov
2017-03-13 14:33 ` [PATCH 3/6] x86/gup: Add 5-level paging support Kirill A. Shutemov
2017-03-14  9:38   ` [tip:x86/mm] x86/mm/gup: " tip-bot for Kirill A. Shutemov
2017-03-13 14:33 ` [PATCH 4/6] x86/ident_map: " Kirill A. Shutemov
2017-03-14  9:38   ` [tip:x86/mm] x86/mm/ident_map: " tip-bot for Kirill A. Shutemov
2017-03-13 14:33 ` [PATCH 5/6] x86/vmalloc: " Kirill A. Shutemov
2017-03-14  9:39   ` [tip:x86/mm] x86/mm/vmalloc: " tip-bot for Kirill A. Shutemov
2017-03-13 14:33 ` [PATCH 6/6] x86/power: " Kirill A. Shutemov
2017-03-14  9:39   ` [tip:x86/mm] " tip-bot for Kirill A. Shutemov
2017-03-13 19:46 ` [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 Linus Torvalds
2017-03-14  7:47 ` Ingo Molnar
2017-03-14  8:24   ` Kirill A. Shutemov
2017-03-14  8:33     ` Thomas Gleixner
2017-03-14 17:48   ` Linus Torvalds
2017-03-15 14:51     ` Kirill A. Shutemov
2017-03-15 15:42     ` Kirill A. Shutemov
2017-03-15  9:23   ` Michal Hocko

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