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From: Catalin Marinas <catalin.marinas@arm.com>
To: "David S. Miller" <davem@davemloft.net>
Cc: rmk+lkml@arm.linux.org.uk, linux-kernel@vger.kernel.org
Subject: Re: 2.6.13-rc3: cache flush missing from somewhere
Date: Mon, 01 Aug 2005 13:24:04 +0100	[thread overview]
Message-ID: <tnxzms1c0bf.fsf@arm.com> (raw)
In-Reply-To: 20050730.124052.104057695.davem@davemloft.net

"David S. Miller" <davem@davemloft.net> wrote:
> From: Russell King <rmk+lkml@arm.linux.org.uk>
> Date: Fri, 29 Jul 2005 16:13:43 +0100
>
>> My current patch to get this working is below.  The only thing which
>> really seems to fix the issue is the __flush_dcache_page call in
>> read_pages() - if I remove this, I get spurious segfaults and illegal
>> instruction faults.
>
> If one cpu stores, does it get picked up in the other cpu's I-cache?

It only gets picked up by the other CPU's D-cache (which is fully
coherent between cores). The I-cache needs to be invalidated on each
CPU.

> If not, you cannot use the lazy dcache flushing method, and in fact
> you must broadcast the flush on all processors.

Why wouldn't the lazy dcache flushing method work? My understanding is
that if there is no user mapping for a given page, there's no reason
to flush the dcache and just postpone it until the page is faulted
in. When the page fault occurs the dcache should be flushed (on one
CPU is enough) and the icache invalidated on all the CPUs.

-- 
Catalin


  parent reply	other threads:[~2005-08-01 12:25 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-07-29 15:13 2.6.13-rc3: cache flush missing from somewhere Russell King
2005-07-30 19:40 ` David S. Miller
2005-07-30 20:08   ` Russell King
2005-07-31  0:09     ` David S. Miller
2005-08-01 12:24   ` Catalin Marinas [this message]
2005-08-01 15:35     ` David S. Miller
2005-08-01 16:34       ` Catalin Marinas
2005-08-01 16:40     ` Russell King
2005-08-01 16:54       ` Catalin Marinas
2005-08-01 17:01         ` Russell King
2005-08-01 18:37           ` Catalin Marinas

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