Re: [PATCH] alpha: spinlock: don't perform memory access in locked critical section

["Måns Rullgård" <mans@mansr.com>]

Will Deacon <will.deacon@arm.com> writes:

> Hi Al, Matt,
>
> On Mon, May 06, 2013 at 09:53:30PM +0100, Al Viro wrote:
>> On Mon, May 06, 2013 at 01:19:51PM -0700, Matt Turner wrote:
>> 
>> > I'm not sure of the interpretation that LDA counts as a memory access.
>> > 
>> > The manual says it's Ra <- Rbv + SEXT(disp).
>> > 
>> > It's not touching memory that I can see.
>> 
>> More to the point, the same manual gives explicit list of instructions
>> that shouldn't occur between LDx_L and STx_C, and LDA does not belong to any
>> of those.  I suspect that Will has misparsed the notations in there - LDx is
>> present in the list, but it's _not_ "all instructions with mnemonics starting
>> with LD", just the 4 "load integer from memory" ones.  FWIW, instructions
>> with that encoding (x01xxx<a:5><b:5><offs:16>) are grouped so:
>> 	LDAx - LDA, LDAH; load address
>> 	LDx -  LDL, LDQ, LDBU, LDWU; load memory data into integer register
>> 	LDQ_U; load unaligned
>> 	LDx_L - LDL_L, LDQ_L; load locked
>> 	STx_C - STL_C, STQ_C; store conditional
>> 	STx - STL, STQ, STB, STW; store
>> 	STQ_U; store unaligned
>
> Your suspicions are right! I did assume that LDA fell under the LDx class,
> so apologies for the false alarm. I suspect I should try and get out more,
> rather than ponder over this reference manual.

LDA uses the address generation circuitry from the load/store unit, but
it does not actually access memory.  It is merely a convenient way of
performing certain arithmetic operations, be it for scheduling reasons
or for the different range of immediate values available.

-- 
Måns Rullgård
mans@mansr.com