From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757780Ab0EAX3H (ORCPT ); Sat, 1 May 2010 19:29:07 -0400 Received: from mail-pz0-f204.google.com ([209.85.222.204]:49222 "EHLO mail-pz0-f204.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757864Ab0EAX3A convert rfc822-to-8bit (ORCPT ); Sat, 1 May 2010 19:29:00 -0400 DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=TdcMqsjyQT14asUft/eb5+clAahIXTzkk64kbeJaE5suBnhWjZLpr4PpSKDzYZ55wC BwL53S+M+c4eDyEbIi/5p45ao0eRdR5vjivwkF5I97QgOFM4VpnubDxnvWi9uMQTCQJA 6J6GNNV+f2NL7XaiZ0D/RSKpMnH1Bch1mSK6w= MIME-Version: 1.0 In-Reply-To: References: <1270681920-4461-1-git-send-email-linus.walleij@stericsson.com> <20100422110025.GC20008@n2100.arm.linux.org.uk> <20100501224429.GA17693@n2100.arm.linux.org.uk> Date: Sat, 1 May 2010 16:28:59 -0700 X-Google-Sender-Auth: 94d02731739fd625 Message-ID: Subject: Re: [PATCH 00/11] ARM: PrimeCell DMA Interface v5 From: Dan Williams To: Linus Walleij Cc: Russell King - ARM Linux , Linus WALLEIJ , "akpm@linux-foundation.org" , Grant Likely , "linux-arm-kernel@lists.infradead.org" , "linux-mmc@vger.kernel.org" , STEricsson_nomadik_linux , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, May 1, 2010 at 4:04 PM, Linus Walleij wrote: > 2010/5/2 Russell King - ARM Linux : > >> Versatile has some MUXing on three of the DMA signals, so (eg) we >> really don't want UARTs claiming DMAs just because they're in existence >> and not in use - that would prevent DMAs from being used for (eg) AACI >> or MMC. > > As long as Versatile doesn't specify any filter function or > data for the channel allocation function (it currently doesn't and defaults > to NULL) it won't even try to call the DMA engine to allocate a channel > for say the UART. > > There is nothing blocking some other peripheral from grabbing a > muxed channel in that case. > > But the implementation of the DMA engine would be better of > handling the muxing dynamically I believe, so when the PL011 > driver (say) requests a DMA channel, it doesn't mean it requests the > *physical* channel and holds it (unless the driver is very naďvely > implemented) it nominally means it reserves a placeholder in the > DMA engine. > > When the driver issues a request to perform a DMA transfer, it will pull > out a physical channel and use that, then return it. If there is too > much combat about the physical channels, you configure out DMA > for the least wanted PrimeCells. > Could you simulate this by publishing more struct dma_chans than are physically present, and then handle the muxing internal to the driver? Or am I misunderstanding the usage model?