* Re: [PATCH v1 1/2] RISC-V: Provide a framework for parsing multi-letter ISA extensions
[not found] <20211224211632.1698523-2-atishp@rivosinc.com>
@ 2022-01-01 2:37 ` kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2022-01-01 2:37 UTC (permalink / raw)
To: Atish Patra; +Cc: llvm, kbuild-all
Hi Atish,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linux/master]
[also build test WARNING on robh/for-next linus/master v5.16-rc7 next-20211224]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Atish-Patra/Provide-a-fraemework-for-RISC-V-ISA-extensions/20211225-051801
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 136057256686de39cc3a07c2e39ef6bc43003ff6
config: riscv-randconfig-r024-20220101 (https://download.01.org/0day-ci/archive/20220101/202201011012.ZeiwqIeg-lkp@intel.com/config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project c054402170cd8466683a20385befc0523aba3359)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install riscv cross compiling tool for clang build
# apt-get install binutils-riscv64-linux-gnu
# https://github.com/0day-ci/linux/commit/30cc2f98601a733995aadbd52fbcefbb5c37511d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Atish-Patra/Provide-a-fraemework-for-RISC-V-ISA-extensions/20211225-051801
git checkout 30cc2f98601a733995aadbd52fbcefbb5c37511d
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash arch/riscv/kernel/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> arch/riscv/kernel/cpufeature.c:82:24: warning: address of array 'edata->dtprop' will always evaluate to 'true' [-Wpointer-bool-conversion]
if (!edata || !edata->dtprop)
~~~~~~~~^~~~~~
1 warning generated.
vim +82 arch/riscv/kernel/cpufeature.c
76
77 int riscv_isa_ext_list_add(struct riscv_isa_ext_data *edata)
78 {
79 struct device_node *node, *enode;
80 int eid;
81
> 82 if (!edata || !edata->dtprop)
83 return -EINVAL;
84
85 node = of_find_node_by_path("/cpus");
86 if (!node) {
87 pr_err("No CPU information found in DT\n");
88 return -ENOENT;
89 }
90
91 enode = of_get_child_by_name(node, "riscv,isa-ext");
92 if (!enode) {
93 pr_err("No riscv-isa-ext found in DT\n");
94 return -ENOENT;
95 }
96
97 eid = edata->isa_ext_id;
98 if (eid < RISCV_ISA_EXT_BASE || eid >= RISCV_ISA_EXT_MAX)
99 return -EINVAL;
100
101 if (!of_property_read_bool(enode, edata->dtprop)) {
102 pr_err("The ISA extension %s is not present in DT\n", edata->dtprop);
103 return -ENODEV;
104 }
105
106 /* Enable the extension id in the riscv_isa for easier probing */
107 riscv_isa[0] |= 1 << eid;
108 list_add(&edata->node, &riscv_isa_ext_list);
109 pr_info("RISC-V ISA extension '%s' available\n", edata->uprop);
110
111 return 0;
112 }
113
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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