From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23FE97B for ; Sun, 29 May 2022 13:02:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653829364; x=1685365364; h=date:from:to:cc:subject:message-id:mime-version; bh=tlxgE6hyNSvGnjBkyDs0fJIfcbbIMY2hwMSUj2jCnV8=; b=Q5vcvA5mqAfhVXYRaMgjSt9LKRR6n4RnxVHpCg5byo0dgYfhZmE2dd2M emfCoBBlQukq9CIhXSndUjvShAeQvDUZwQbexALcpQqQxFng8EL686SHg WUPn0cUx0plbdfFGpwK3hzVSWLQRQSTefkqlgRguiOFP8ugYXKGPQ1awR qzShPfMppbY7fIPWPPkfyZnwi0/lWgAd2Uvi/hiUImnhSC6lVnwBauK2U l1MEmBfC0rzLzKFjhnyMUGrXjpcVgrdX203yVzF93mLzrZ2by/aADmNPG aSti7CJSa8GPTBq2nRiFCcvd+74Zk/LSICUW0nW4zNJD7x72CKt6m0qMK A==; X-IronPort-AV: E=McAfee;i="6400,9594,10361"; a="254671035" X-IronPort-AV: E=Sophos;i="5.91,260,1647327600"; d="scan'208";a="254671035" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 May 2022 06:02:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,260,1647327600"; d="scan'208";a="678767226" Received: from lkp-server01.sh.intel.com (HELO 60dabacc1df6) ([10.239.97.150]) by fmsmga002.fm.intel.com with ESMTP; 29 May 2022 06:02:41 -0700 Received: from kbuild by 60dabacc1df6 with local (Exim 4.95) (envelope-from ) id 1nvIZ7-00011w-33; Sun, 29 May 2022 13:02:41 +0000 Date: Sun, 29 May 2022 21:02:18 +0800 From: kernel test robot To: Evan Quan Cc: llvm@lists.linux.dev, kbuild-all@lists.01.org, linux-kernel@vger.kernel.org, Alex Deucher , Lijo Lazar Subject: drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v11_0_pptable.h:163:17: warning: field smc_pptable within 'struct smu_11_0_powerplay_table' is less aligned than 'PPTable_t' and is usually due to 'struct smu_11_0_powerplay_table' being packed, which can lea... Message-ID: <202205292007.2uMB4GkA-lkp@intel.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Evan, FYI, the error/warning still remains. tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 664a393a2663a0f62fc1b18157ccae33dcdbb8c8 commit: 837d542a09cd533055423dfca7e621a9c1d13c5b drm/amd/pm: relocate the power related headers date: 5 months ago config: arm-randconfig-c002-20220528 (https://download.01.org/0day-ci/archive/20220529/202205292007.2uMB4GkA-lkp@intel.com/config) compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 0fbe3f3f486e01448121f7931a4ca29fac1504ab) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm cross compiling tool for clang build # apt-get install binutils-arm-linux-gnueabi # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=837d542a09cd533055423dfca7e621a9c1d13c5b git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout 837d542a09cd533055423dfca7e621a9c1d13c5b # save the config file COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot All warnings (new ones prefixed by >>): >> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v11_0_pptable.h:163:17: warning: field smc_pptable within 'struct smu_11_0_powerplay_table' is less aligned than 'PPTable_t' and is usually due to 'struct smu_11_0_powerplay_table' being packed, which can lead to unaligned accesses [-Wunaligned-access] PPTable_t smc_pptable; //PPTable_t in smu11_driver_if.h ^ 1 warning generated. -- >> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v11_0_7_pptable.h:193:17: warning: field smc_pptable within 'struct smu_11_0_7_powerplay_table' is less aligned than 'PPTable_t' and is usually due to 'struct smu_11_0_7_powerplay_table' being packed, which can lead to unaligned accesses [-Wunaligned-access] PPTable_t smc_pptable; //PPTable_t in smu11_driver_if.h ^ 1 warning generated. -- >> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v13_0_pptable.h:161:12: warning: field smc_pptable within 'struct smu_13_0_powerplay_table' is less aligned than 'PPTable_t' and is usually due to 'struct smu_13_0_powerplay_table' being packed, which can lead to unaligned accesses [-Wunaligned-access] PPTable_t smc_pptable; //PPTable_t in driver_if.h ^ 1 warning generated. vim +163 drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v11_0_pptable.h ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 137 ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 138 struct smu_11_0_powerplay_table ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 139 { ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 140 struct atom_common_table_header header; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 141 uint8_t table_revision; 4b2bb705a0b72f drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Kenneth Feng 2019-04-04 142 uint16_t table_size; //Driver portion table size. The offset to smc_pptable including header size ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 143 uint32_t golden_pp_id; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 144 uint32_t golden_revision; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 145 uint16_t format_id; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 146 uint32_t platform_caps; //POWERPLAYABLE::ulPlatformCaps ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 147 ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 148 uint8_t thermal_controller_type; //one of SMU_11_0_PP_THERMALCONTROLLER ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 149 ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 150 uint16_t small_power_limit1; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 151 uint16_t small_power_limit2; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 152 uint16_t boost_power_limit; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 153 uint16_t od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning. ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 154 uint16_t od_power_save_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning. ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 155 uint16_t software_shutdown_temp; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 156 ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 157 uint16_t reserve[6]; //Zero filled field reserved for future use ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 158 ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 159 struct smu_11_0_power_saving_clock_table power_saving_clock; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 160 struct smu_11_0_overdrive_table overdrive_table; ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 161 73abde4d864b38 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Matt Coffin 2019-11-11 162 #ifndef SMU_11_0_PARTIAL_PPTABLE ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 @163 PPTable_t smc_pptable; //PPTable_t in smu11_driver_if.h 73abde4d864b38 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Matt Coffin 2019-11-11 164 #endif 2dd1209e576068 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2019-02-12 165 } __attribute__((packed)); ae35cd6a480f9c drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h Huang Rui 2018-12-12 166 :::::: The code at line 163 was first introduced by commit :::::: ae35cd6a480f9c2ac356f792c9a9321a5863776a drm/amd/powerplay: add pptable header for smu11 :::::: TO: Huang Rui :::::: CC: Alex Deucher -- 0-DAY CI Kernel Test Service https://01.org/lkp