From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 173DF198 for ; Thu, 11 Aug 2022 12:33:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660221233; x=1691757233; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=sePsZki6rNGWhBmuPvYhrZYvNbhkUqbQ1QhmhPMXOe8=; b=TeOHxExRAXh1GxjpeNEgc+d49Tm5NwwoURZbQI4wRbxUQrrWp+wFMI6Z SyWNzMyPRxY9hABmV2zi2otO91LJ/sJSTQAxKGsQMWimrlaeA+7QztH6o U385rmxXGL8PVFOm7DBTtauKbLdHfw4yxNLqqf1bngcl7Ck6qdcbXDj0X gWlhytUJmgdUYF5mrNkJ7wOiYzitewivJSc0Z6nl64V1wwMViUC9uIOcE 5+jDbbmr8WYZ4WmxqXXbHIsTf0R+XuKjY97denqGWWX6ulNKSdhyglUQi gIHlWREEMinn7tXn31AgsrpWbH/gUi+o518fHYxEvn4wwx1EXw+pu+BnO A==; X-IronPort-AV: E=McAfee;i="6400,9594,10435"; a="288900956" X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="288900956" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2022 05:33:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="708599120" Received: from lkp-server02.sh.intel.com (HELO cfab306db114) ([10.239.97.151]) by fmsmga002.fm.intel.com with ESMTP; 11 Aug 2022 05:33:49 -0700 Received: from kbuild by cfab306db114 with local (Exim 4.96) (envelope-from ) id 1oM7Nk-0000Bj-1z; Thu, 11 Aug 2022 12:33:48 +0000 Date: Thu, 11 Aug 2022 20:32:59 +0800 From: kernel test robot To: Will McVicker , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Rob Herring , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Bjorn Helgaas Cc: llvm@lists.linux.dev, kbuild-all@lists.01.org, kernel-team@android.com, Vidya Sagar , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 2/2] PCI: dwc: add support for 64-bit MSI target address Message-ID: <202208112017.jLSXQXjV-lkp@intel.com> References: <20220809180051.1063653-3-willmcvicker@google.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220809180051.1063653-3-willmcvicker@google.com> Hi Will, Thank you for the patch! Yet something to improve: [auto build test ERROR on helgaas-pci/next] [also build test ERROR on linus/master next-20220811] [cannot apply to v5.19] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Will-McVicker/PCI-dwc-Add-support-for-64-bit-MSI-target-addresses/20220810-020421 base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next config: powerpc-randconfig-c003-20220810 (https://download.01.org/0day-ci/archive/20220811/202208112017.jLSXQXjV-lkp@intel.com/config) compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 5f1c7e2cc5a3c07cbc2412e851a7283c1841f520) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc cross compiling tool for clang build # apt-get install binutils-powerpc-linux-gnu # https://github.com/intel-lab-lkp/linux/commit/7a41faa4e02a0a8945f79e7af86d10e371b2fc12 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Will-McVicker/PCI-dwc-Add-support-for-64-bit-MSI-target-addresses/20220810-020421 git checkout 7a41faa4e02a0a8945f79e7af86d10e371b2fc12 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash drivers/pci/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot All errors (new ones prefixed by >>): >> drivers/pci/controller/dwc/pcie-designware.c:85:5: error: redefinition of 'dw_pcie_msi_capabilities' u16 dw_pcie_msi_capabilities(struct dw_pcie *pci) ^ drivers/pci/controller/dwc/pcie-designware.h:467:19: note: previous definition is here static inline u16 dw_pcie_msi_capabilities(struct dw_pcie *pci) ^ 1 error generated. vim +/dw_pcie_msi_capabilities +85 drivers/pci/controller/dwc/pcie-designware.c 84 > 85 u16 dw_pcie_msi_capabilities(struct dw_pcie *pci) 86 { 87 u8 offset; 88 89 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI); 90 return dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS); 91 } 92 EXPORT_SYMBOL_GPL(dw_pcie_msi_capabilities); 93 -- 0-DAY CI Kernel Test Service https://01.org/lkp