From: Sami Tolvanen <samitolvanen@google.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Kees Cook <keescook@chromium.org>
Cc: Guo Ren <guoren@kernel.org>, Deepak Gupta <debug@rivosinc.com>,
Nathan Chancellor <nathan@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Fangrui Song <maskray@google.com>,
linux-riscv@lists.infradead.org, llvm@lists.linux.dev,
linux-kernel@vger.kernel.org,
Sami Tolvanen <samitolvanen@google.com>
Subject: [PATCH v2 6/6] lkdtm: Fix CFI_BACKWARD on RISC-V
Date: Tue, 15 Aug 2023 20:34:49 +0000 [thread overview]
Message-ID: <20230815203442.1608773-14-samitolvanen@google.com> (raw)
In-Reply-To: <20230815203442.1608773-8-samitolvanen@google.com>
On RISC-V, the return address is before the current frame pointer,
unlike on most other architectures. Use the correct offset on RISC-V
to fix the CFI_BACKWARD test.
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
---
drivers/misc/lkdtm/cfi.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/lkdtm/cfi.c b/drivers/misc/lkdtm/cfi.c
index fc28714ae3a6..6a33889d0902 100644
--- a/drivers/misc/lkdtm/cfi.c
+++ b/drivers/misc/lkdtm/cfi.c
@@ -68,12 +68,20 @@ static void lkdtm_CFI_FORWARD_PROTO(void)
#define no_pac_addr(addr) \
((__force __typeof__(addr))((uintptr_t)(addr) | PAGE_OFFSET))
+#ifdef CONFIG_RISCV
+/* https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc#frame-pointer-convention */
+#define FRAME_RA_OFFSET (-1)
+#else
+#define FRAME_RA_OFFSET 1
+#endif
+
/* The ultimate ROP gadget. */
static noinline __no_ret_protection
void set_return_addr_unchecked(unsigned long *expected, unsigned long *addr)
{
/* Use of volatile is to make sure final write isn't seen as a dead store. */
- unsigned long * volatile *ret_addr = (unsigned long **)__builtin_frame_address(0) + 1;
+ unsigned long * volatile *ret_addr =
+ (unsigned long **)__builtin_frame_address(0) + FRAME_RA_OFFSET;
/* Make sure we've found the right place on the stack before writing it. */
if (no_pac_addr(*ret_addr) == expected)
@@ -88,7 +96,8 @@ static noinline
void set_return_addr(unsigned long *expected, unsigned long *addr)
{
/* Use of volatile is to make sure final write isn't seen as a dead store. */
- unsigned long * volatile *ret_addr = (unsigned long **)__builtin_frame_address(0) + 1;
+ unsigned long * volatile *ret_addr =
+ (unsigned long **)__builtin_frame_address(0) + FRAME_RA_OFFSET;
/* Make sure we've found the right place on the stack before writing it. */
if (no_pac_addr(*ret_addr) == expected)
--
2.41.0.694.ge786442a9b-goog
next prev parent reply other threads:[~2023-08-15 20:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-15 20:34 [PATCH v2 0/6] riscv: SCS support Sami Tolvanen
2023-08-15 20:34 ` [PATCH v2 1/6] riscv: VMAP_STACK overflow detection thread-safe Sami Tolvanen
2023-08-15 20:34 ` [PATCH v2 2/6] riscv: Deduplicate IRQ stack switching Sami Tolvanen
2023-08-24 8:12 ` Clément Léger
2023-08-24 19:03 ` Sami Tolvanen
2023-08-15 20:34 ` [PATCH v2 3/6] riscv: Move global pointer loading to a macro Sami Tolvanen
2023-08-15 20:34 ` [PATCH v2 4/6] riscv: Implement Shadow Call Stack Sami Tolvanen
2023-08-15 20:34 ` [PATCH v2 5/6] riscv: Use separate IRQ shadow call stacks Sami Tolvanen
2023-08-15 20:34 ` Sami Tolvanen [this message]
2023-08-15 23:39 ` [PATCH v2 6/6] lkdtm: Fix CFI_BACKWARD on RISC-V Kees Cook
2023-08-16 16:42 ` [PATCH v2 0/6] riscv: SCS support Nathan Chancellor
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