From: kernel test robot <lkp@intel.com>
To: ixgbe01 <yangwang@njis.ac.cn>
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
Han Gao <gaohan@iscas.ac.cn>
Subject: [esmil:th1520 38/52] drivers/cpufreq/light-mpw-cpufreq.c:273:6: warning: unused variable 'val'
Date: Thu, 7 Dec 2023 21:07:17 +0800 [thread overview]
Message-ID: <202312072107.dt7pWSXY-lkp@intel.com> (raw)
tree: https://github.com/esmil/linux th1520
head: 64731462dd62508162241c28bd319829df635524
commit: 851266b8b6ef516302144607a424a7986e950822 [38/52] add TH1520 cpu frequency driver
config: x86_64-allmodconfig (https://download.01.org/0day-ci/archive/20231207/202312072107.dt7pWSXY-lkp@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231207/202312072107.dt7pWSXY-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202312072107.dt7pWSXY-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/cpufreq/light-mpw-cpufreq.c:273:6: warning: unused variable 'val' [-Wunused-variable]
u32 val = readl(ap_sys_reg);
^
1 warning generated.
vim +/val +273 drivers/cpufreq/light-mpw-cpufreq.c
264
265 /*
266 * Set CPU PLL1's frequency as minimum on panic
267 */
268 static int panic_cpufreq_notifier_call(struct notifier_block *nb,
269 unsigned long action, void *data)
270 {
271 int cpu = smp_processor_id();
272 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
> 273 u32 val = readl(ap_sys_reg);
274
275 pr_info("enter panic_cpufreq_notifier_call\n");
276
277 /*
278 * set CPU PLL1's frequency as minimum to compatible voltage
279 * becarefull if the PLL1 is serving the cpu core, swith to PLL0 first
280 */
281 if (strcmp(__clk_get_name(clk_get_parent(clks[LIGHT_C910_CCLK].clk)),
282 __clk_get_name(clks[LIGHT_C910_CCLK_I0].clk))) {
283 pr_debug("[%s,%d]\n", __func__, __LINE__);
284 clk_prepare_enable(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
285 clk_set_rate(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk, policy->min * 1000);
286 udelay(1);
287 clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_C910_CCLK_I0].clk);
288
289 pr_debug("[%s,%d]\n", __func__, __LINE__);
290 }
291
292 pr_debug("[%s,%d]\n", __func__, __LINE__);
293 /*
294 * since the clk driver will use PLL1 as the default clock source,
295 * in order to compatible voltage which is unpredictable we should
296 * set the CPU PLL1's frequency as minimum in advance, otherwise the
297 * system may crash in crash kernel stage.
298 */
299 clk_prepare_enable(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
300 clk_set_rate(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk, policy->min * 1000);
301 udelay(1);
302
303 pr_info("finish to execute cpufreq notifier callback on panic\n");
304
305 return 0;
306 }
307
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
reply other threads:[~2023-12-07 13:07 UTC|newest]
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