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[103.168.172.200]) by smtp.gmail.com with ESMTPSA id g26-20020ac84dda000000b00430b3fbfeb3sm285249qtw.47.2024.03.22.16.39.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Mar 2024 16:39:07 -0700 (PDT) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailfauth.nyi.internal (Postfix) with ESMTP id D8C561200032; Fri, 22 Mar 2024 19:39:05 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Fri, 22 Mar 2024 19:39:05 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledruddtfedgudegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgggfestdekredtredttdenucfhrhhomhepuehoqhhunhcu hfgvnhhguceosghoqhhunhdrfhgvnhhgsehgmhgrihhlrdgtohhmqeenucggtffrrghtth gvrhhnpeeivdevvedvffejuedvudekfeeltdeguedtleetudehudfffeejvdelkefgueeh ueenucffohhmrghinhepghhithhhuhgsrdgtohhmpdhruhhsthdqlhgrnhhgrdhorhhgpd iiuhhlihhptghhrghtrdgtohhmnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghm pehmrghilhhfrhhomhepsghoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlih hthidqieelvdeghedtieegqddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhm rghilhdrtghomhesfhhigihmvgdrnhgrmhgv X-ME-Proxy: Feedback-ID: iad51458e:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 22 Mar 2024 19:39:02 -0400 (EDT) From: Boqun Feng To: rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, llvm@lists.linux.dev Cc: Miguel Ojeda , Alex Gaynor , Wedson Almeida Filho , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Alan Stern , Andrea Parri , Will Deacon , Peter Zijlstra , Nicholas Piggin , David Howells , Jade Alglave , Luc Maranget , "Paul E. McKenney" , Akira Yokosawa , Daniel Lustig , Joel Fernandes , Nathan Chancellor , Nick Desaulniers , kent.overstreet@gmail.com, Greg Kroah-Hartman , elver@google.com, Mark Rutland , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Catalin Marinas , torvalds@linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-fsdevel@vger.kernel.org Subject: [WIP 0/3] Memory model and atomic API in Rust Date: Fri, 22 Mar 2024 16:38:35 -0700 Message-ID: <20240322233838.868874-1-boqun.feng@gmail.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi, Since I see more and more Rust code is comming in, I feel like this should be sent sooner rather than later, so here is a WIP to open the discussion and get feedback. One of the most important questions we need to answer is: which memory (ordering) model we should use when developing Rust in Linux kernel, given Rust has its own memory ordering model[1]. I had some discussion with Rust language community to understand their position on this: https://github.com/rust-lang/unsafe-code-guidelines/issues/348#issuecomment-1218407557 https://github.com/rust-lang/unsafe-code-guidelines/issues/476#issue-2001382992 My takeaway from these discussions, along with other offline discussion is that supporting two memory models is challenging for both correctness reasoning (some one needs to provide a model) and implementation (one model needs to be aware of the other model). So that's not wise to do (at least at the beginning). So the most reasonable option to me is: we only use LKMM for Rust code in kernel (i.e. avoid using Rust's own atomic). Because kernel developers are more familiar with LKMM and when Rust code interacts with C code, it has to use the model that C code uses. And this patchset is the result of that option. I introduced an atomic library to wrap and implement LKMM atomics (of course, given it's a WIP, so it's unfinished). Things to notice: * I know I could use Rust macro to generate the whole set of atomics, but I choose not to in the beginning, as I want to make it easier to review. * Very likely, we will only have AtomicI32, AtomicI64 and AtomicUsize (i.e no atomic for bool, u8, u16, etc), with limited support for atomic load and store on 8/16 bits. * I choose to re-implement atomics in Rust `asm` because we are still figuring out how we can make it easy and maintainable for Rust to call a C function _inlinely_ (Gary makes some progress [2]). Otherwise, atomic primitives would be function calls, and that can be performance bottleneck in a few cases. * I only have two API implemented and two architecture supported yet, the complete support surely can be added when everyone is on the same page. Any suggestion, question, review, help is welcome! Regards, Boqun [1]: https://doc.rust-lang.org/std/sync/atomic/#memory-model-for-atomic-accesses [2]: https://rust-for-linux.zulipchat.com/#narrow/stream/288089-General/topic/LTO.20Rust.20modules.20with.20C.20helpers/near/425361365 Boqun Feng (3): rust: Introduce atomic module rust: atomic: Add ARM64 fetch_add_relaxed() rust: atomic: Add fetch_sub_release() rust/kernel/sync.rs | 1 + rust/kernel/sync/atomic.rs | 65 +++++++++++++++++++++++++++ rust/kernel/sync/atomic/arch.rs | 15 +++++++ rust/kernel/sync/atomic/arch/arm64.rs | 46 +++++++++++++++++++ rust/kernel/sync/atomic/arch/x86.rs | 48 ++++++++++++++++++++ 5 files changed, 175 insertions(+) create mode 100644 rust/kernel/sync/atomic.rs create mode 100644 rust/kernel/sync/atomic/arch.rs create mode 100644 rust/kernel/sync/atomic/arch/arm64.rs create mode 100644 rust/kernel/sync/atomic/arch/x86.rs -- 2.44.0