Re: [PATCH v2 4/4] ASoC: qcom: apq8016_sbc: Add support for msm8953/msm8976 SoC

Dmitry Baryshkov
2024-07-27T22:22:35Z

On Sat, Jul 27, 2024 at 08:20:27PM GMT, Adam Skladowski wrote:
> From: Vladimir Lypak <vladimir.lypak@gmail.com>
>
> Introduce support for audio card on MSM8953/MSM8976 platform.
> Main difference between those two is Q6AFE CLK API supported by firmware
> which influence way we enable digital codec clock.
> Either inside machine driver or outside via q6afe-clocks driver.
>
> Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
> [Adam: Add MSM8976, rename functions, add mclk setting,add msg]
> Co-developed-by: Adam Skladowski <a39.skl@gmail.com>
> Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
> ---
> sound/soc/qcom/apq8016_sbc.c | 68 ++++++++++++++++++++++++++++++++++--
> 1 file changed, 66 insertions(+), 2 deletions(-)
>
> diff --git a/sound/soc/qcom/apq8016_sbc.c b/sound/soc/qcom/apq8016_sbc.c
> index 303dd88206b1..453ca4795603 100644
> --- a/sound/soc/qcom/apq8016_sbc.c
> +++ b/sound/soc/qcom/apq8016_sbc.c
> @@ -22,6 +22,11 @@
>
> #define MI2S_COUNT (MI2S_QUINARY + 1)
>
> +enum afe_clk_api {
> + Q6AFE_CLK_V1,
> + Q6AFE_CLK_V2
> +};

Are these v1/v2 coming from some msm-N.M kernel? It's not obvious from
the patch, but msm8916 also falls into v1 category. Is that expected?

> +
> struct apq8016_sbc_data {
> struct snd_soc_card card;
> void __iomem *mic_iomux;
> @@ -29,6 +34,8 @@ struct apq8016_sbc_data {
> void __iomem *quin_iomux;
> struct snd_soc_jack jack;
> bool jack_setup;
> + enum afe_clk_api q6afe_clk_ver;
> + bool dig_cdc_mclk_en;
> int mi2s_clk_count[MI2S_COUNT];
> };
>
> @@ -192,6 +199,28 @@ static int qdsp6_dai_get_lpass_id(struct snd_soc_dai *cpu_dai)
> }
> }
>
> +static int qdsp6_get_clk_id(struct apq8016_sbc_data *data, int mi2s_id)
> +{
> + if (data->q6afe_clk_ver == Q6AFE_CLK_V2) {
> + switch (mi2s_id) {
> + case MI2S_PRIMARY:
> + return Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT;
> + case MI2S_SECONDARY:
> + return Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT;
> + case MI2S_TERTIARY:
> + return Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT;
> + case MI2S_QUATERNARY:
> + return Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT;
> + case MI2S_QUINARY:
> + return Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT;
> + default:
> + break;
> + }
> + }
> + /* If AFE CLK isn't V2 return V1 */
> + return LPAIF_BIT_CLK;
> +}
> +
> static int msm8916_qdsp6_dai_init(struct snd_soc_pcm_runtime *rtd)
> {
> struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
> @@ -214,8 +243,17 @@ static int msm8916_qdsp6_startup(struct snd_pcm_substream *substream)
>
> if (++data->mi2s_clk_count[mi2s] > 1)
> return 0;
> + /*
> + * On newer legacy SoC (MSM8976) lpass codec clocks are not available in gcc region
> + * so we have to request clock from machine driver using V1 API)
> + */
> + if (data->q6afe_clk_ver == Q6AFE_CLK_V1 && data->dig_cdc_mclk_en == true) {

Nit: line feed after &&

> + ret = snd_soc_dai_set_sysclk(cpu_dai, LPAIF_DIG_CLK, DEFAULT_MCLK_RATE, 0);
> + if (ret)
> + dev_err(card->dev, "Failed to enable LPAIF dig clk: %d\n", ret);
> + }
>
> - ret = snd_soc_dai_set_sysclk(cpu_dai, LPAIF_BIT_CLK, MI2S_BCLK_RATE, 0);
> + ret = snd_soc_dai_set_sysclk(cpu_dai, qdsp6_get_clk_id(data, mi2s), MI2S_BCLK_RATE, 0);
> if (ret)
> dev_err(card->dev, "Failed to enable LPAIF bit clk: %d\n", ret);
> return ret;
> @@ -236,9 +274,16 @@ static void msm8916_qdsp6_shutdown(struct snd_pcm_substream *substream)
> if (--data->mi2s_clk_count[mi2s] > 0)
> return;
>
> - ret = snd_soc_dai_set_sysclk(cpu_dai, LPAIF_BIT_CLK, 0, 0);
> + ret = snd_soc_dai_set_sysclk(cpu_dai, qdsp6_get_clk_id(data, mi2s), 0, 0);
> if (ret)
> dev_err(card->dev, "Failed to disable LPAIF bit clk: %d\n", ret);
> +
> + if (data->q6afe_clk_ver == Q6AFE_CLK_V1 && data->dig_cdc_mclk_en == true) {

Nit: And here too, please.

> + ret = snd_soc_dai_set_sysclk(cpu_dai, LPAIF_DIG_CLK, 0, 0);
> + if (ret)
> + dev_err(card->dev, "Failed to disable LPAIF dig clk: %d\n", ret);
> + }
> +
> }
>
> static const struct snd_soc_ops msm8916_qdsp6_be_ops = {
> @@ -279,6 +324,23 @@ static void msm8916_qdsp6_add_ops(struct snd_soc_card *card)
> }
> }
>
> +static void msm8953_qdsp6_add_ops(struct snd_soc_card *card)
> +{
> + struct apq8016_sbc_data *pdata = snd_soc_card_get_drvdata(card);
> +
> + pdata->q6afe_clk_ver = Q6AFE_CLK_V2;
> + msm8916_qdsp6_add_ops(card);
> +}
> +
> +static void msm8976_qdsp6_add_ops(struct snd_soc_card *card)
> +{
> + struct apq8016_sbc_data *pdata = snd_soc_card_get_drvdata(card);
> +
> + pdata->q6afe_clk_ver = Q6AFE_CLK_V1;
> + pdata->dig_cdc_mclk_en = true;
> + msm8916_qdsp6_add_ops(card);
> +}
> +
> static const struct snd_kcontrol_new apq8016_sbc_snd_controls[] = {
> SOC_DAPM_PIN_SWITCH("Headphone Jack"),
> SOC_DAPM_PIN_SWITCH("Mic Jack"),
> @@ -343,6 +405,8 @@ static int apq8016_sbc_platform_probe(struct platform_device *pdev)
> static const struct of_device_id apq8016_sbc_device_id[] __maybe_unused = {
> { .compatible = "qcom,apq8016-sbc-sndcard", .data = apq8016_sbc_add_ops },
> { .compatible = "qcom,msm8916-qdsp6-sndcard", .data = msm8916_qdsp6_add_ops },
> + { .compatible = "qcom,msm8953-qdsp6-sndcard", .data = msm8953_qdsp6_add_ops },
> + { .compatible = "qcom,msm8976-qdsp6-sndcard", .data = msm8976_qdsp6_add_ops },
> {},
> };
> MODULE_DEVICE_TABLE(of, apq8016_sbc_device_id);
> --
> 2.45.2
>

--
With best wishes
Dmitry