From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4594020127A; Tue, 29 Oct 2024 07:18:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730186334; cv=none; b=ju9sH7z4koO/yk+K5pt28NkZcGbq/WU07vZYpp1JWc4+LDzv6W8kYLnIPS5QnfFtlaXoB38151LTFOW/bY/qw/0eixY147hw72rzFU1WZMoiK0L/prblnIYfP0ykQtSJ8Uc8Pv3DJ9diLZ8qp+l9M/L+8mLYXIaA2BijntJsp0Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730186334; c=relaxed/simple; bh=BdYcTmAXb1SfXEeowtRZE7Rf2n06MdmrBquWG32nqao=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=g1VI5BbmVJ3cKnNgv1IfjGzpoV6+MSe7eWWeY2Qoq7rejoiVa8mUPzS1fUUcmqSNp+sFhd/eQrq9UjPIRzHSIPgkQ6MRbombzUyo+R01zx6zI+80aWEbP5zFisO3yaMpzy31o0+PF8/FOzQy6K1G6RKfvePVXZ/tHOB+DMLK7rk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XDD2zK2y; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XDD2zK2y" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730186333; x=1761722333; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=BdYcTmAXb1SfXEeowtRZE7Rf2n06MdmrBquWG32nqao=; b=XDD2zK2y3X8oWGvs67rmpMvz0e4WxNU0+5inf4mNT79cFRA96fOsgmZa M4e6ICC8m8Y/aj2VYR3FmDqTGGCBFFmwLPHlx5KPOFMq4w6s/QPw9tGQ0 Gss58xxPFYqg4qas2Cy1Z5td+CTKxrtsWAQ/xAeUDaShnBuubDfdJyuG/ 0k45CQe7mQ4kNVh73YJTxdSGBqYEya0HmD6qgN6n2TTg0cOzDq7SbasPM 4rAOnyJYJOMSpAOx6ZQnZkbC80fQ7iGFJmKJ2tJ5EhdhYfhL2Yeo9QbKl 9ZuLan8m20vrLpexLGL3qy0qtcdB4g/yRdk7DdGs4k2zsGPZb4T3C4ZvR g==; X-CSE-ConnectionGUID: HuqXKB67SoeXukozAa/0tQ== X-CSE-MsgGUID: TTdZNgNPRHifmpBX6d1CrA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="29774261" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="29774261" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 00:18:52 -0700 X-CSE-ConnectionGUID: ifNbUCZ6QHay4UdqM/kgoQ== X-CSE-MsgGUID: qNn49BT5RyqWAcTYDzsScw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,241,1725346800"; d="scan'208";a="81430699" Received: from lkp-server01.sh.intel.com (HELO a48cf1aa22e8) ([10.239.97.150]) by fmviesa006.fm.intel.com with ESMTP; 29 Oct 2024 00:18:46 -0700 Received: from kbuild by a48cf1aa22e8 with local (Exim 4.96) (envelope-from ) id 1t5gV2-000dN8-1u; Tue, 29 Oct 2024 07:18:44 +0000 Date: Tue, 29 Oct 2024 15:18:37 +0800 From: kernel test robot To: Frank Li , Rob Herring , Saravana Kannan , Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Bjorn Helgaas , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, Frank Li Subject: Re: [PATCH v6 2/7] PCI: dwc: Using parent_bus_addr in of_range to eliminate cpu_addr_fixup() Message-ID: <202410291546.kvgEWJv7-lkp@intel.com> References: <20241028-pci_fixup_addr-v6-2-ebebcd8fd4ff@nxp.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241028-pci_fixup_addr-v6-2-ebebcd8fd4ff@nxp.com> Hi Frank, kernel test robot noticed the following build errors: [auto build test ERROR on 9852d85ec9d492ebef56dc5f229416c925758edc] url: https://github.com/intel-lab-lkp/linux/commits/Frank-Li/of-address-Add-parent_bus_addr-to-struct-of_pci_range/20241029-030935 base: 9852d85ec9d492ebef56dc5f229416c925758edc patch link: https://lore.kernel.org/r/20241028-pci_fixup_addr-v6-2-ebebcd8fd4ff%40nxp.com patch subject: [PATCH v6 2/7] PCI: dwc: Using parent_bus_addr in of_range to eliminate cpu_addr_fixup() config: arm-defconfig (https://download.01.org/0day-ci/archive/20241029/202410291546.kvgEWJv7-lkp@intel.com/config) compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241029/202410291546.kvgEWJv7-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202410291546.kvgEWJv7-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/pci/controller/dwc/pcie-designware-host.c:782:55: error: incompatible pointer types passing 'u64 *' (aka 'unsigned long long *') to parameter of type 'resource_size_t *' (aka 'unsigned int *') [-Werror,-Wincompatible-pointer-types] if (dw_pcie_get_untranslate_addr(pci, atu.pci_addr, &atu.cpu_addr)) ^~~~~~~~~~~~~ drivers/pci/controller/dwc/pcie-designware-host.c:422:23: note: passing argument to parameter 'i_addr' here resource_size_t *i_addr) ^ 1 error generated. vim +782 drivers/pci/controller/dwc/pcie-designware-host.c 745 746 static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) 747 { 748 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); 749 struct dw_pcie_ob_atu_cfg atu = { 0 }; 750 struct resource_entry *entry; 751 int i, ret; 752 753 /* Note the very first outbound ATU is used for CFG IOs */ 754 if (!pci->num_ob_windows) { 755 dev_err(pci->dev, "No outbound iATU found\n"); 756 return -EINVAL; 757 } 758 759 /* 760 * Ensure all out/inbound windows are disabled before proceeding with 761 * the MEM/IO (dma-)ranges setups. 762 */ 763 for (i = 0; i < pci->num_ob_windows; i++) 764 dw_pcie_disable_atu(pci, PCIE_ATU_REGION_DIR_OB, i); 765 766 for (i = 0; i < pci->num_ib_windows; i++) 767 dw_pcie_disable_atu(pci, PCIE_ATU_REGION_DIR_IB, i); 768 769 i = 0; 770 resource_list_for_each_entry(entry, &pp->bridge->windows) { 771 if (resource_type(entry->res) != IORESOURCE_MEM) 772 continue; 773 774 if (pci->num_ob_windows <= ++i) 775 break; 776 777 atu.index = i; 778 atu.type = PCIE_ATU_TYPE_MEM; 779 atu.cpu_addr = entry->res->start; 780 atu.pci_addr = entry->res->start - entry->offset; 781 > 782 if (dw_pcie_get_untranslate_addr(pci, atu.pci_addr, &atu.cpu_addr)) 783 return -EINVAL; 784 785 /* Adjust iATU size if MSG TLP region was allocated before */ 786 if (pp->msg_res && pp->msg_res->parent == entry->res) 787 atu.size = resource_size(entry->res) - 788 resource_size(pp->msg_res); 789 else 790 atu.size = resource_size(entry->res); 791 792 ret = dw_pcie_prog_outbound_atu(pci, &atu); 793 if (ret) { 794 dev_err(pci->dev, "Failed to set MEM range %pr\n", 795 entry->res); 796 return ret; 797 } 798 } 799 800 if (pp->io_size) { 801 if (pci->num_ob_windows > ++i) { 802 atu.index = i; 803 atu.type = PCIE_ATU_TYPE_IO; 804 atu.cpu_addr = pp->io_base; 805 atu.pci_addr = pp->io_bus_addr; 806 atu.size = pp->io_size; 807 808 ret = dw_pcie_prog_outbound_atu(pci, &atu); 809 if (ret) { 810 dev_err(pci->dev, "Failed to set IO range %pr\n", 811 entry->res); 812 return ret; 813 } 814 } else { 815 pp->cfg0_io_shared = true; 816 } 817 } 818 819 if (pci->num_ob_windows <= i) 820 dev_warn(pci->dev, "Ranges exceed outbound iATU size (%d)\n", 821 pci->num_ob_windows); 822 823 pp->msg_atu_index = i; 824 825 i = 0; 826 resource_list_for_each_entry(entry, &pp->bridge->dma_ranges) { 827 if (resource_type(entry->res) != IORESOURCE_MEM) 828 continue; 829 830 if (pci->num_ib_windows <= i) 831 break; 832 833 ret = dw_pcie_prog_inbound_atu(pci, i++, PCIE_ATU_TYPE_MEM, 834 entry->res->start, 835 entry->res->start - entry->offset, 836 resource_size(entry->res)); 837 if (ret) { 838 dev_err(pci->dev, "Failed to set DMA range %pr\n", 839 entry->res); 840 return ret; 841 } 842 } 843 844 if (pci->num_ib_windows <= i) 845 dev_warn(pci->dev, "Dma-ranges exceed inbound iATU size (%u)\n", 846 pci->num_ib_windows); 847 848 return 0; 849 } 850 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki