Re: [PATCH v4 3/4] drivers: firmware: add riscv SSE support

[kernel test robot <lkp@intel.com>]

Hi Clément,

kernel test robot noticed the following build warnings:

[auto build test WARNING on soc/for-next]
[also build test WARNING on linus/master v6.15-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Cl-ment-L-ger/riscv-add-SBI-SSE-extension-definitions/20250516-232636
base:   https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git for-next
patch link:    https://lore.kernel.org/r/20250516152355.560448-4-cleger%40rivosinc.com
patch subject: [PATCH v4 3/4] drivers: firmware: add riscv SSE support
config: riscv-randconfig-002-20250517 (https://download.01.org/0day-ci/archive/20250517/202505171615.CDDgY2HV-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project f819f46284f2a79790038e1f6649172789734ae8)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250517/202505171615.CDDgY2HV-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505171615.CDDgY2HV-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/firmware/riscv/riscv_sse.c:395:31: warning: variable 'reg_evt' set but not used [-Wunused-but-set-variable]
     395 |         struct sse_registered_event *reg_evt;
         |                                      ^
   1 warning generated.


vim +/reg_evt +395 drivers/firmware/riscv/riscv_sse.c

   390	
   391	int sse_event_enable(struct sse_event *event)
   392	{
   393		int ret = 0, cpu;
   394		struct sse_per_cpu_evt cpu_evt;
 > 395		struct sse_registered_event *reg_evt;
   396	
   397		scoped_guard(mutex, &sse_mutex) {
   398			cpus_read_lock();
   399			if (sse_event_is_global(event->evt_id)) {
   400				reg_evt = event->global;
   401				ret = sse_event_enable_local(event);
   402			} else {
   403				cpu_evt.event = event;
   404				atomic_set(&cpu_evt.error, 0);
   405				cpu_evt.func = SBI_SSE_EVENT_ENABLE;
   406				on_each_cpu(sse_event_per_cpu_func, &cpu_evt, 1);
   407				ret = atomic_read(&cpu_evt.error);
   408				if (ret) {
   409					cpu_evt.func = SBI_SSE_EVENT_DISABLE;
   410					on_each_cpu(sse_event_per_cpu_func, &cpu_evt, 1);
   411				} else {
   412					for_each_online_cpu(cpu) {
   413	
   414					}
   415				}
   416			}
   417			cpus_read_unlock();
   418		}
   419	
   420		return ret;
   421	}
   422	

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