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X-CSE-ConnectionGUID: 3sJhhyIxSGK7T00KFRrsdg== X-CSE-MsgGUID: 9T02LNvKQlyTa60ewZMHgw== X-IronPort-AV: E=McAfee;i="6800,10657,11633"; a="70633841" X-IronPort-AV: E=Sophos;i="6.20,253,1758610800"; d="scan'208";a="70633841" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2025 15:28:33 -0800 X-CSE-ConnectionGUID: VRBZGpVlTEKrNLGb2AjDVQ== X-CSE-MsgGUID: jdVY+2RWT8y8YlhD9KahRg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,253,1758610800"; d="scan'208";a="195857387" Received: from lkp-server01.sh.intel.com (HELO 4664bbef4914) ([10.239.97.150]) by fmviesa009.fm.intel.com with ESMTP; 05 Dec 2025 15:28:28 -0800 Received: from kbuild by 4664bbef4914 with local (Exim 4.98.2) (envelope-from ) id 1vRfDt-00000000Feb-3xD7; Fri, 05 Dec 2025 23:28:25 +0000 Date: Sat, 6 Dec 2025 07:27:43 +0800 From: kernel test robot To: Will McVicker , Catalin Marinas , Will Deacon , Daniel Lezcano , Thomas Gleixner , Krzysztof Kozlowski , Alim Akhtar Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev, Will McVicker , Donghoon Yu , Rob Herring , John Stultz , Youngmin Nam , Peter Griffin , Tudor Ambarus , =?iso-8859-1?Q?Andr=E9?= Draszik , Conor Dooley , Marek Szyprowski , "Russell King (Oracle)" , linux-samsung-soc@vger.kernel.org, kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7 5/6] clocksource/drivers/exynos_mct: Add module support for ARM64 Message-ID: <202512060730.wBnpCnQv-lkp@intel.com> References: <20251205011027.720512-6-willmcvicker@google.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251205011027.720512-6-willmcvicker@google.com> Hi Will, kernel test robot noticed the following build warnings: [auto build test WARNING on bca42080637ce3a21092fc0f7d5411e853b0c3b3] url: https://github.com/intel-lab-lkp/linux/commits/Will-McVicker/clocksource-drivers-exynos_mct-Don-t-register-as-a-sched_clock-on-arm64/20251205-091403 base: bca42080637ce3a21092fc0f7d5411e853b0c3b3 patch link: https://lore.kernel.org/r/20251205011027.720512-6-willmcvicker%40google.com patch subject: [PATCH v7 5/6] clocksource/drivers/exynos_mct: Add module support for ARM64 config: arm64-randconfig-004-20251205 (https://download.01.org/0day-ci/archive/20251206/202512060730.wBnpCnQv-lkp@intel.com/config) compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 14bf95b06a18b9b59c89601cbc0e5a6f2176b118) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251206/202512060730.wBnpCnQv-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202512060730.wBnpCnQv-lkp@intel.com/ All warnings (new ones prefixed by >>, old ones prefixed by <<): >> WARNING: modpost: vmlinux: section mismatch in reference: exynos4_mct_probe+0x70 (section: .text.exynos4_mct_probe) -> mct_init_dt (section: .init.text) -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki