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Tue, 09 Jun 2026 15:20:12 -0700 (PDT) From: Rosen Penev To: dmaengine@vger.kernel.org Cc: Vinod Koul , Frank Li , Zhang Wei , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , linux-kernel@vger.kernel.org (open list), linuxppc-dev@lists.ozlabs.org (open list:FREESCALE DMA DRIVER), llvm@lists.linux.dev (open list:CLANG/LLVM BUILD SUPPORT:Keyword:\b(?i:clang|llvm)\b) Subject: [PATCHv3 14/15] dmaengine: fsldma: replace ppc-specific accessors with portable generic ones Date: Tue, 9 Jun 2026 15:19:25 -0700 Message-ID: <20260609221926.35538-15-rosenp@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260609221926.35538-1-rosenp@gmail.com> References: <20260609221926.35538-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit - Convert remaining in_be32/in_le32 calls to FSL_DMA_IN macro - Replace __ilog2 with generic ilog2 (pull in linux/log2.h) - Add linux/io.h include - Expand non-PPC accessor support from ARM-only to all architectures - Guard 64-bit generic accessors with CONFIG_64BIT; provide emulation using 32-bit accessors on 32-bit platforms Add COMPILE_TEST support as a result for extra compile coverage. Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev --- drivers/dma/Kconfig | 2 +- drivers/dma/fsldma.c | 11 ++++++----- drivers/dma/fsldma.h | 35 ++++++++++++++++++++++++++++++++--- 3 files changed, 39 insertions(+), 9 deletions(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 302021540d76..9b13e7aa31c7 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -206,7 +206,7 @@ config EP93XX_DMA config FSL_DMA tristate "Freescale Elo series DMA support" - depends on FSL_SOC + depends on FSL_SOC || COMPILE_TEST select DMA_ENGINE select ASYNC_TX_ENABLE_CHANNEL_SWITCH help diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index 7d0c80121aa4..d4c9b81ade0d 100644 --- a/drivers/dma/fsldma.c +++ b/drivers/dma/fsldma.c @@ -32,6 +32,8 @@ #include #include #include +#include +#include #include #include "dmaengine.h" #include "fsldma.h" @@ -266,7 +268,7 @@ static void fsl_chan_set_src_loop_size(struct fsldma_chan *chan, int size) case 4: case 8: mode &= ~FSL_DMA_MR_SAHTS_MASK; - mode |= FSL_DMA_MR_SAHE | (__ilog2(size) << 14); + mode |= FSL_DMA_MR_SAHE | (ilog2(size) << 14); break; } @@ -299,7 +301,7 @@ static void fsl_chan_set_dst_loop_size(struct fsldma_chan *chan, int size) case 4: case 8: mode &= ~FSL_DMA_MR_DAHTS_MASK; - mode |= FSL_DMA_MR_DAHE | (__ilog2(size) << 16); + mode |= FSL_DMA_MR_DAHE | (ilog2(size) << 16); break; } @@ -326,7 +328,7 @@ static void fsl_chan_set_request_count(struct fsldma_chan *chan, int size) mode = get_mr(chan); mode &= ~FSL_DMA_MR_BWC_MASK; - mode |= (__ilog2(size) << 24) & FSL_DMA_MR_BWC_MASK; + mode |= (ilog2(size) << 24) & FSL_DMA_MR_BWC_MASK; set_mr(chan, mode); } @@ -1007,8 +1009,7 @@ static irqreturn_t fsldma_ctrl_irq(int irq, void *data) u32 gsr, mask; int i; - gsr = (fdev->feature & FSL_DMA_BIG_ENDIAN) ? in_be32(fdev->regs) - : in_le32(fdev->regs); + gsr = FSL_DMA_IN(fdev, fdev->regs, 32); mask = 0xff000000; dev_dbg(fdev->dev, "IRQ: gsr 0x%.8x\n", gsr); diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h index d7b7a3138b85..01f93123b233 100644 --- a/drivers/dma/fsldma.h +++ b/drivers/dma/fsldma.h @@ -232,17 +232,46 @@ static void fsl_iowrite64be(u64 val, u64 __iomem *addr) out_be32((u32 __iomem *)addr + 1, (u32)val); } #endif -#endif - -#if defined(CONFIG_ARM64) || defined(CONFIG_ARM) +#else #define fsl_ioread32(p) ioread32(p) #define fsl_ioread32be(p) ioread32be(p) #define fsl_iowrite32(v, p) iowrite32(v, p) #define fsl_iowrite32be(v, p) iowrite32be(v, p) + +#ifdef CONFIG_64BIT #define fsl_ioread64(p) ioread64(p) #define fsl_ioread64be(p) ioread64be(p) #define fsl_iowrite64(v, p) iowrite64(v, p) #define fsl_iowrite64be(v, p) iowrite64be(v, p) +#else +static inline u64 fsl_ioread64(const u64 __iomem *addr) +{ + u32 val_lo = ioread32((u32 __iomem *)addr); + u32 val_hi = ioread32((u32 __iomem *)addr + 1); + + return ((u64)val_hi << 32) + val_lo; +} + +static inline void fsl_iowrite64(u64 val, u64 __iomem *addr) +{ + iowrite32(val >> 32, (u32 __iomem *)addr + 1); + iowrite32((u32)val, (u32 __iomem *)addr); +} + +static inline u64 fsl_ioread64be(const u64 __iomem *addr) +{ + u32 val_hi = ioread32be((u32 __iomem *)addr); + u32 val_lo = ioread32be((u32 __iomem *)addr + 1); + + return ((u64)val_hi << 32) + val_lo; +} + +static inline void fsl_iowrite64be(u64 val, u64 __iomem *addr) +{ + iowrite32be(val >> 32, (u32 __iomem *)addr); + iowrite32be((u32)val, (u32 __iomem *)addr + 1); +} +#endif #endif #define FSL_DMA_IN(fsl_dma, addr, width) \ -- 2.54.0