From: kernel test robot <lkp@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev
Subject: [broonie-ci:arm64-xs-decode 2/2] arch/arm64/mm/fault.c:80:5: warning: format specifies type 'unsigned long' but the argument has type 'unsigned long long'
Date: Tue, 30 Jun 2026 12:33:48 +0800 [thread overview]
Message-ID: <202606301257.DIHcZVRB-lkp@intel.com> (raw)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/ci.git arm64-xs-decode
head: 400df87aee7b6f393e5d363d377cb5a613f8b37a
commit: 400df87aee7b6f393e5d363d377cb5a613f8b37a [2/2] arm64: mm: When logging data aborts only decode Xs when ISV=1
config: arm64-randconfig-001-20260630 (https://download.01.org/0day-ci/archive/20260630/202606301257.DIHcZVRB-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260630/202606301257.DIHcZVRB-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202606301257.DIHcZVRB-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> arch/arm64/mm/fault.c:80:5: warning: format specifies type 'unsigned long' but the argument has type 'unsigned long long' [-Wformat]
79 | pr_alert(" Xs = %lu\n",
| ~~~
| %llu
80 | (iss2 & ESR_ELx_Xs_MASK) >> ESR_ELx_Xs_SHIFT);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:534:35: note: expanded from macro 'pr_alert'
534 | printk(KERN_ALERT pr_fmt(fmt), ##__VA_ARGS__)
| ~~~ ^~~~~~~~~~~
include/linux/printk.h:511:60: note: expanded from macro 'printk'
511 | #define printk(fmt, ...) printk_index_wrap(_printk, fmt, ##__VA_ARGS__)
| ~~~ ^~~~~~~~~~~
include/linux/printk.h:483:19: note: expanded from macro 'printk_index_wrap'
483 | _p_func(_fmt, ##__VA_ARGS__); \
| ~~~~ ^~~~~~~~~~~
1 warning generated.
vim +80 arch/arm64/mm/fault.c
63
64 static void data_abort_decode(unsigned long esr)
65 {
66 unsigned long iss2 = ESR_ELx_ISS2(esr);
67
68 pr_alert("Data abort info:\n");
69
70 if (esr & ESR_ELx_ISV) {
71 pr_alert(" Access size = %u byte(s)\n",
72 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
73 pr_alert(" SSE = %lu, SRT = %lu\n",
74 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
75 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
76 pr_alert(" SF = %lu, AR = %lu\n",
77 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
78 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
79 pr_alert(" Xs = %lu\n",
> 80 (iss2 & ESR_ELx_Xs_MASK) >> ESR_ELx_Xs_SHIFT);
81 } else {
82 pr_alert(" ISV = 0, ISS = 0x%08lx, ISS2 = 0x%08lx\n",
83 esr & ESR_ELx_ISS_MASK, iss2);
84 }
85
86 pr_alert(" CM = %lu, WnR = %lu, TnD = %lu, TagAccess = %lu\n",
87 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
88 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT,
89 (iss2 & ESR_ELx_TnD) >> ESR_ELx_TnD_SHIFT,
90 (iss2 & ESR_ELx_TagAccess) >> ESR_ELx_TagAccess_SHIFT);
91
92 pr_alert(" GCS = %ld, Overlay = %lu, DirtyBit = %lu\n",
93 (iss2 & ESR_ELx_GCS) >> ESR_ELx_GCS_SHIFT,
94 (iss2 & ESR_ELx_Overlay) >> ESR_ELx_Overlay_SHIFT,
95 (iss2 & ESR_ELx_DirtyBit) >> ESR_ELx_DirtyBit_SHIFT);
96 }
97
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
reply other threads:[~2026-06-30 4:35 UTC|newest]
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