Re: [PATCH v8 01/10] iio: pressure: dps310: fix CFG_REG bit definitions

[Jonathan Cameron <jic23@kernel.org>]

On Mon, 21 Sep 2026 21:31:23 +0300
Rupesh Majhi <zoone.rupert@gmail.com> wrote:

> Driver defines them as BIT(4), BIT(5) and BIT(6). Per datasheet P_SHIFT
> is bit 2, FIFO_EN is bit 1 and SPI_MODE is bit 0.
> 
> Only P_SHIFT has a user. dps310_set_pres_precision() sets it at
> oversampling 16 or above, so with wrong bit the result register is never
> shifted and stops matching the scale factor compensation divides by.
> in_pressure_input returns -ERANGE at oversampling 16, 32 and 64.
> 
> FIFO_EN needed by FIFO support later in this series.
> 
> Fixes: ba6ec48e76bc ("iio: Add driver for Infineon DPS310")
> Fixes: d711a3c7dc82 ("iio: dps310: Add pressure sensing capability")
> Cc: stable@vger.kernel.org
> Assisted-by: LLM
> Signed-off-by: Rupesh Majhi <zoone.rupert@gmail.com>
Given we are near the end of the cycle and I'm going to be
travelling for most of the remaining time (which makes it
very random whether I get to IIO review or not!), I'm going
to pick up what is ready of this series.

So applied this one to the testing branch of iio.git.

Thanks,

Jonathan

> ---
>  drivers/iio/pressure/dps310.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/iio/pressure/dps310.c b/drivers/iio/pressure/dps310.c
> index 45bdb8c7670f..35260b399390 100644
> --- a/drivers/iio/pressure/dps310.c
> +++ b/drivers/iio/pressure/dps310.c
> @@ -50,9 +50,9 @@
>  #define DPS310_CFG_REG		0x09
>  #define  DPS310_INT_HL		BIT(7)
>  #define  DPS310_TMP_SHIFT_EN	BIT(3)
> -#define  DPS310_PRS_SHIFT_EN	BIT(4)
> -#define  DPS310_FIFO_EN		BIT(5)
> -#define  DPS310_SPI_EN		BIT(6)
> +#define  DPS310_PRS_SHIFT_EN	BIT(2)
> +#define  DPS310_FIFO_EN		BIT(1)
> +#define  DPS310_SPI_EN		BIT(0)
>  #define DPS310_RESET		0x0c
>  #define  DPS310_RESET_MAGIC	0x09
>  #define DPS310_COEF_BASE	0x10