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[2a02:3100:b2e2:2001:c47f:5a89:3d9a:cd2d]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a02770e8f2sm136528375e9.6.2026.10.03.02.38.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 03 Oct 2026 02:38:36 -0700 (PDT) From: Karl Mehltretter To: Russell King , Miguel Ojeda Cc: Karl Mehltretter , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Tamir Duberstein , Alexandre Courbot , =?UTF-8?q?Onur=20=C3=96zkan?= , Arnd Bergmann , Linus Walleij , Christian Schrefl , Bradley Morgan , "Paul E . McKenney" , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , linux-arm-kernel@lists.infradead.org, rust-for-linux@vger.kernel.org, llvm@lists.linux.dev, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] ARM: rust: Enable Rust support for ARMv5TE Date: Sat, 3 Oct 2026 11:38:27 +0200 Message-Id: <20261003093827.77857-3-kmehltretter@gmail.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20261003093827.77857-1-kmehltretter@gmail.com> References: <20261003093827.77857-1-kmehltretter@gmail.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit HAVE_RUST is currently selected for CPU_32v7 only. The arm-unknown-linux-gnueabi target used for ARMv7 emits ARMv6 instructions (+v6), so it cannot be used for ARMv5. Use rustc's built-in armv5te-unknown-linux-gnueabi target instead. It keeps the Linux EABI (no short enums, unlike the -none-eabi targets) and is soft-float and strict-align. Kernels that also contain ARMv4 or ARMv4T CPUs are built for the lowest architecture and stay excluded. CPU_32v5 also covers the ARMv5T ARM1020. C code is already built with -march=armv5te there, so Rust matches. The kernel crate implements atomics through the C helpers rather than core::sync::atomic, so the missing atomic instructions on ARMv5 do not matter. The only gap was the 2-byte xchg() added by "ARM: cmpxchg: support 2-byte xchg() on pre-ARMv6 CPUs". core::sync::atomic types up to 32 bits still compile on this target, but LLVM lowers them to __sync_* libcalls which the kernel does not provide. Nothing in the tree uses them. Such code would fail to link on ARMv5 while it links on ARMv7. Tested on v7.3-rc1 with clang 22.1.8, rustc 1.99.0 and bindgen 0.73.2 in QEMU versatilepb and on a Microchip SAM9X75 Curiosity board (both ARM926EJ-S). The Rust samples, all Rust KUnit suites and the doctests pass. Link: https://lore.kernel.org/rust-for-linux/CACRpkdYF0sVB2-qgy=GzETSR3+2sagVQPGdunDQDJrn8KqJorA@mail.gmail.com/ Link: https://lore.kernel.org/rust-for-linux/b13d37bd-ec68-4713-94e5-e9ed4d6a6354@gmail.com/ Assisted-by: LLM Signed-off-by: Karl Mehltretter --- Documentation/rust/arch-support.rst | 2 +- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 4 ++++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/rust/arch-support.rst b/Documentation/rust/arch-support.rst index 4f980815e92a..2193d8e1e156 100644 --- a/Documentation/rust/arch-support.rst +++ b/Documentation/rust/arch-support.rst @@ -15,7 +15,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file. ============= ================ ============================================== Architecture Level of support Constraints ============= ================ ============================================== -``arm`` Maintained ARMv7 Little Endian only. +``arm`` Maintained ARMv5TE and ARMv7, Little Endian only. ``arm64`` Maintained Little Endian only. ``loongarch`` Maintained \- ``riscv`` Maintained ``riscv64`` and LLVM/Clang only. diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ffbc7f386131..f6b14d9f0e1f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -138,7 +138,7 @@ config ARM select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RSEQ - select HAVE_RUST if CPU_LITTLE_ENDIAN && CPU_32v7 && !KASAN + select HAVE_RUST if CPU_LITTLE_ENDIAN && (CPU_32v7 || (CPU_32v5 && !CPU_32v4T && !CPU_32v4)) && !KASAN select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS select HAVE_UID16 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 573813ef5e77..ef94eae1f047 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -150,7 +150,11 @@ endif KBUILD_CPPFLAGS +=$(cpp-y) KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include $(srctree)/arch/arm/include/asm/unified.h -msoft-float +ifdef CONFIG_CPU_32v5 +KBUILD_RUSTFLAGS += --target=armv5te-unknown-linux-gnueabi +else KBUILD_RUSTFLAGS += --target=arm-unknown-linux-gnueabi +endif CHECKFLAGS += -D__arm__ -- 2.39.5 (Apple Git-154)