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Wed, 26 Aug 2026 06:45:18 -0700 (PDT) X-Received: by 2002:a17:90a:d2c6:b0:38e:5c6:4db9 with SMTP id 98e67ed59e1d1-3966d3dafb9mr15825822a91.11.1787751918186; Wed, 26 Aug 2026 06:45:18 -0700 (PDT) Received: from [10.219.57.226] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-141a8f20036sm13571333c88.5.2026.08.26.06.45.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Aug 2026 06:45:17 -0700 (PDT) Message-ID: <2febead3-0f0c-4e0d-b11a-8c61ec027f44@oss.qualcomm.com> Date: Wed, 26 Aug 2026 19:15:07 +0530 Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/15] accel/qda: Add DMA-backed GEM objects and memory manager integration To: rob.clark@oss.qualcomm.com, =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: Oded Gabbay , Jonathan Corbet , Shuah Khan , Randy Dunlap , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sumit Semwal , Bharath Kumar , Chenna Kesava Raju , srinivas.kandagatla@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, llvm@lists.linux.dev, iommu@lists.linux.dev, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org References: <20260817-qda-v2-v2-0-69a02e9090d4@oss.qualcomm.com> <20260817-qda-v2-v2-9-69a02e9090d4@oss.qualcomm.com> <7030a8f8-f320-4b09-b2de-2c8e897409f8@amd.com> Content-Language: en-US From: Ekansh Gupta In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: Es_RTUVrtVPat1pcM73RAqaI5KUs9r91 X-Authority-Analysis: v=2.4 cv=VdLH+lp9 c=1 sm=1 tr=0 ts=6a8eedef cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=sLzL-2GVjjNmCx-rav0A:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: Es_RTUVrtVPat1pcM73RAqaI5KUs9r91 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI2MDExMyBTYWx0ZWRfX+x54mpVPt0Ii GXxqnnVfp/dt0DWAKmRP0HdAkWtF73rV51P5TyU+7cLOnXAgpAievIKEAufSqoLbFKaLNtzlJEb wHclG19jsBFwx2cUOPazzMm0O3/TXTNysqyaFkfnb8DzABVp5PNXEYerNHkJVVDEYE0LC89rp0L YN5heTRYKFvFp+f68U5ofTMjm7fx4ESgTikf1rwjKBW0ng4S7MH454Gdr1/If4ee2YvORAWUGiD dbdhs3Fa3wTOm8C0MzDJwtyuFfX5dxKXdFyxfDkbO0TPpyucGsnyo7p0nh75uqMic06IlGquhd9 Jzta6Q9yZquHQzb1EZv434AMlp8b4PnW3Rvele4HM6tODnFCQO6hghu55vnluLTTywYsdLwLSml d6oxt5RD9xWcRjncAMGhCqEDSN7MMQqkk7ymymu1awJkyDFhX8zaeeq/cEtVz0A9Fx6MYUQi/Vz 0MmsQvOgC0f5igQkgBg== X-Proofpoint-Spam-Info: AW1haW4tMjYwODI2MDExMyBTYWx0ZWRfX9oDWbnMff+LY 4rk1a701iZTrn2PVN5/k/c1I09duFKG0/FHvI1vDMfthjHZB17yZwTEsAymVjCz3JgVeMVjtOGu hGz42On2ekWVdNk5tWda6KhaOjBnu2M= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-26_03,2026-08-26_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 spamscore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608260113 On 24-08-2026 20:37, Rob Clark wrote: >>> qda_memory_dma.c / qda_memory_dma.h >>> DMA coherent allocation backend. qda_dma_alloc() calls >>> dma_alloc_coherent() on the CB device and encodes the stream ID >>> (SID) in the upper 32 bits of the returned DMA address, following >>> the Qualcomm FastRPC convention for IOMMU address space tagging. >>> qda_dma_free() strips the SID prefix before calling >>> dma_free_coherent(). >>> >>> qda_memory_manager.c >>> Adds process-to-device assignment: each DRM file (process) is >>> assigned one IOMMU context bank device for the lifetime of the >>> session. qda_memory_manager_assign_device() first checks whether >>> the process already has a device (reusing it with a refcount >>> increment), then falls back to claiming an unassigned device. >>> qda_memory_manager_alloc() and qda_memory_manager_free() delegate >>> to the DMA backend after resolving the correct CB device for the >>> calling process. >> Oh, stuff like that is usually a pretty big NO-GO now. >> >> AMD has made the same mistake with KFD and it resulted in a massive chaos. >> >> The DRM file is the driver context your process uses and even if there are multiple DRM files for the same PID you should absolute *NOT* share anything between them. >> >> The general rule of thumb is to not attach anything to the process using the DRM file descriptor. > A couple other things to keep in mind: > > 1. drm device fd can be passed across processes > 2. virtgpu/virglrenderer drm native ctx is a single process that opens > the drm device file N times on behalf of N guest userspace processes. > > All that to say, Christian is right here.. drm_file is your context, > pgtables should be attached to the drm_file (potentially via > drm_gpuvm.. which you perhaps want to use). > > BR, > -R > >> Regards, >> Christian. >> Hi Christian, Rob, Thank you for highlighting this. I'll rework the CB assignment to be per-drm_file. Each open() will get a CB assigned from the available pool (find-first-available, not find-by-PID). The assigned_pid field and PID-matching logic will be removed entirely. The hardware has a limited number of context banks that serve many sessions (on fastrpc, via the DT "qcom,nsessions" property), so multiple drm_files may end up sharing the same underlying CB due to hardware constraints, but while implementing that also, I'll ensure that the association goes through drm_file->driver_priv, never through a PID scan. I'll also look into drm_gpuvm for the longer-term address space management as Rob suggested. Thanks, Ekansh