Re: [PATCH v23 04/10] soc: mediatek: add mtk_mmsys_update_bits API

[Nancy.Lin <nancy.lin@mediatek.com>]

Hi CK,

Thanks for the review.

On Wed, 2022-06-22 at 11:01 +0800, CK Hu wrote:
> Hi, Nancy:
> 
> On Mon, 2022-06-20 at 17:17 +0800, Nancy.Lin wrote:
> > Add mtk_mmsys_update_bits API. Simplify code for update  mmsys reg.
> > It is a preparation for adding support for mmsys config API.
> > 
> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > Tested-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> > ---
> >  drivers/soc/mediatek/mtk-mmsys.c | 36 ++++++++++++++--------------
> > ----
> >  1 file changed, 16 insertions(+), 20 deletions(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> > b/drivers/soc/mediatek/mtk-mmsys.c
> > index a74c86197d6a..b7c7cd469343 100644
> > --- a/drivers/soc/mediatek/mtk-mmsys.c
> > +++ b/drivers/soc/mediatek/mtk-mmsys.c
> > @@ -192,22 +192,27 @@ static int
> > mtk_mmsys_find_match_drvdata(struct
> > mtk_mmsys *mmsys,
> >  	return -EINVAL;
> >  }
> >  
> > +static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32
> > offset, u32 mask, u32 val)
> > +{
> > +	u32 tmp;
> > +
> > +	tmp = readl_relaxed(mmsys->regs + offset);
> > +	tmp = (tmp & ~mask) | val;
> > +	writel_relaxed(tmp, mmsys->regs + offset);
> > +}
> > +
> >  void mtk_mmsys_ddp_connect(struct device *dev,
> >  			   enum mtk_ddp_comp_id cur,
> >  			   enum mtk_ddp_comp_id next)
> >  {
> >  	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
> >  	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
> > -	u32 reg;
> >  	int i;
> >  
> >  	for (i = 0; i < mmsys->data->num_routes; i++)
> > -		if (cur == routes[i].from_comp && next ==
> > routes[i].to_comp) {
> > -			reg = readl_relaxed(mmsys->regs +
> > routes[i].addr);
> > -			reg &= ~routes[i].mask;
> > -			reg |= routes[i].val;
> > -			writel_relaxed(reg, mmsys->regs +
> > routes[i].addr);
> > -		}
> > +		if (cur == routes[i].from_comp && next ==
> > routes[i].to_comp)
> > +			mtk_mmsys_update_bits(mmsys, routes[i].addr,
> > routes[i].mask,
> > +					      routes[i].val);
> >  }
> >  EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
> >  
> > @@ -217,15 +222,11 @@ void mtk_mmsys_ddp_disconnect(struct device
> > *dev,
> >  {
> >  	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
> >  	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
> > -	u32 reg;
> >  	int i;
> >  
> >  	for (i = 0; i < mmsys->data->num_routes; i++)
> > -		if (cur == routes[i].from_comp && next ==
> > routes[i].to_comp) {
> > -			reg = readl_relaxed(mmsys->regs +
> > routes[i].addr);
> > -			reg &= ~routes[i].mask;
> > -			writel_relaxed(reg, mmsys->regs +
> > routes[i].addr);
> > -		}
> > +		if (cur == routes[i].from_comp && next ==
> > routes[i].to_comp)
> > +			mtk_mmsys_update_bits(mmsys, routes[i].addr,
> > routes[i].mask, 0);
> >  }
> >  EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
> >  
> > @@ -234,18 +235,13 @@ static int mtk_mmsys_reset_update(struct
> > reset_controller_dev *rcdev, unsigned l
> >  {
> >  	struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys,
> > rcdev);
> >  	unsigned long flags;
> > -	u32 reg;
> >  
> >  	spin_lock_irqsave(&mmsys->lock, flags);
> >  
> > -	reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
> > -
> >  	if (assert)
> > -		reg &= ~BIT(id);
> > +		mtk_mmsys_update_bits(mmsys, mmsys->data-
> > > sw0_rst_offset, BIT(id), 0);
> > 
> >  	else
> > -		reg |= BIT(id);
> > -
> > -	writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
> > +		mtk_mmsys_update_bits(mmsys, mmsys->data-
> > > sw0_rst_offset, BIT(id), BIT(id));
> 
> More simple code:
> mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id),
> assert ? 0 : BIT(id));
> 
> After this modification,
> 
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> 
OK, I will fix it.

BRs,
Nancy

> >  
> >  	spin_unlock_irqrestore(&mmsys->lock, flags);
> >  
> 
>