From: Namhyung Kim <namhyung@kernel.org>
To: Tengda Wu <wutengda@huaweicloud.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
leo.yan@linux.dev, Li Huafei <lihuafei1@huawei.com>,
Ian Rogers <irogers@google.com>,
Kim Phillips <kim.phillips@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Ingo Molnar <mingo@redhat.com>, Bill Wendling <morbo@google.com>,
Nick Desaulniers <nick.desaulniers+lkml@gmail.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Zecheng Li <zli94@ncsu.edu>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
llvm@lists.linux.dev
Subject: Re: [PATCH v2 03/16] perf annotate-arm64: Generalize arm64_mov__parse to support standard operands
Date: Mon, 6 Apr 2026 23:58:55 -0700 [thread overview]
Message-ID: <adSrL-iZna3pyDrY@z2> (raw)
In-Reply-To: <20260403094800.1418825-4-wutengda@huaweicloud.com>
On Fri, Apr 03, 2026 at 09:47:47AM +0000, Tengda Wu wrote:
> The current arm64_mov__parse() implementation strictly requires the
> operand to contain a symbol suffix in the "<symbol>" format. This
> causes the parser to fail for standard instructions that only contain
> raw immediates or registers without symbolic annotations.
>
> Refactor the function to make symbol matching optional. The parser now
> correctly extracts the target operand and only attempts to parse the
> "<symbol>" suffix if it exists. This change also introduces better
> handling for whitespace and comments, and adds support for multi-register
> check via arm64__check_multi_regs(), ensuring compatibility with a
> wider range of arm64 instruction formats.
>
> Signed-off-by: Tengda Wu <wutengda@huaweicloud.com>
> ---
> .../perf/util/annotate-arch/annotate-arm64.c | 85 ++++++++++++++-----
> 1 file changed, 65 insertions(+), 20 deletions(-)
>
> diff --git a/tools/perf/util/annotate-arch/annotate-arm64.c b/tools/perf/util/annotate-arch/annotate-arm64.c
> index 33080fdca125..4c42323b0c18 100644
> --- a/tools/perf/util/annotate-arch/annotate-arm64.c
> +++ b/tools/perf/util/annotate-arch/annotate-arm64.c
> @@ -14,12 +14,38 @@ struct arch_arm64 {
> regex_t jump_insn;
> };
>
> +static bool arm64__check_multi_regs(const char *op)
> +{
> + char *comma = strchr(op, ',');
> +
> + while (comma) {
> + char *next = comma + 1;
> +
> + next = skip_spaces(next);
> +
> + /*
> + * Check the first valid character after the comma:
> + * - If it is '#', it indicates an immediate offset (e.g., [x1, #16]).
> + * - If it is an alphabetic character, it is highly likely a
> + * register name (e.g., x, w, s, d, q, v, p, z).
> + * - Special cases: Alias and control registers like sp, xzr,
> + * and wzr all start with an alphabetic character.
> + */
> + if (*next && *next != '#' && isalpha(*next))
> + return true;
It seems you check any alphabet charactor after a comma for multi-regs.
Does that mean the first component before the comma should be another
register?
> +
> + comma = strchr(next, ',');
> + }
> +
> + return false;
> +}
> +
> static int arm64_mov__parse(const struct arch *arch __maybe_unused,
> struct ins_operands *ops,
> struct map_symbol *ms __maybe_unused,
> struct disasm_line *dl __maybe_unused)
> {
> - char *s = strchr(ops->raw, ','), *target, *endptr;
> + char *s = strchr(ops->raw, ','), *target, *endptr, *comment, prev;
>
> if (s == NULL)
> return -1;
> @@ -31,29 +57,48 @@ static int arm64_mov__parse(const struct arch *arch __maybe_unused,
> if (ops->source.raw == NULL)
> return -1;
>
> - target = ++s;
> + target = skip_spaces(++s);
> + comment = strchr(s, arch->objdump.comment_char);
> +
> + if (comment != NULL)
> + s = comment - 1;
> + else
> + s = strchr(s, '\0') - 1;
An interesting use of strchr(). Oh, I found the strchr(3) man page
also mentions that it's a supported use case. TIL.
> +
> + while (s > target && isspace(s[0]))
> + --s;
> + s++;
> + prev = *s;
> + *s = '\0';
> ops->target.raw = strdup(target);
> + *s = prev;
> +
> if (ops->target.raw == NULL)
> goto out_free_source;
>
> - ops->target.addr = strtoull(target, &endptr, 16);
> - if (endptr == target)
> - goto out_free_target;
> -
> - s = strchr(endptr, '<');
> - if (s == NULL)
> - goto out_free_target;
> - endptr = strchr(s + 1, '>');
> - if (endptr == NULL)
> - goto out_free_target;
> -
> - *endptr = '\0';
> - *s = ' ';
> - ops->target.name = strdup(s);
> - *s = '<';
> - *endptr = '>';
> - if (ops->target.name == NULL)
> - goto out_free_target;
> + ops->target.multi_regs = arm64__check_multi_regs(ops->target.raw);
> +
> + /* Parse address followed by symbol name, e.g. "addr <symbol>" */
> + if (strchr(target, '<') != NULL) {
> + ops->target.addr = strtoull(target, &endptr, 16);
> + if (endptr == target)
> + goto out_free_target;
Hmm.. shouldn't this part be executed regardless of presence of a symbol
name?
> +
> + s = strchr(endptr, '<');
> + if (s == NULL)
> + goto out_free_target;
It'd be safer to check `if (*skip_spaces(endptr) == '<')` rather than
strchr().
> + endptr = strchr(s + 1, '>');
> + if (endptr == NULL)
> + goto out_free_target;
I'm afraid C++ programs can have symbols with <> for templates.
Probably strrchr() would work.
Thanks,
Namhyung
> +
> + *endptr = '\0';
> + *s = ' ';
> + ops->target.name = strdup(s);
> + *s = '<';
> + *endptr = '>';
> + if (ops->target.name == NULL)
> + goto out_free_target;
> + }
>
> return 0;
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2026-04-07 6:58 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-03 9:47 [PATCH v2 00/16] perf arm64: Support data type profiling Tengda Wu
2026-04-03 9:47 ` [PATCH v2 01/16] perf llvm: Fix arm64 adrp instruction disassembly mismatch with objdump Tengda Wu
2026-04-03 9:47 ` [PATCH v2 02/16] perf capstone: Fix arm64 jump/adrp " Tengda Wu
2026-04-07 6:43 ` Namhyung Kim
2026-04-03 9:47 ` [PATCH v2 03/16] perf annotate-arm64: Generalize arm64_mov__parse to support standard operands Tengda Wu
2026-04-07 6:58 ` Namhyung Kim [this message]
2026-04-03 9:47 ` [PATCH v2 04/16] perf annotate-arm64: Handle load and store instructions Tengda Wu
2026-04-07 7:09 ` Namhyung Kim
2026-04-03 9:47 ` [PATCH v2 05/16] perf annotate: Introduce extract_op_location callback for arch-specific parsing Tengda Wu
2026-04-03 9:47 ` [PATCH v2 06/16] perf dwarf-regs: Adapt get_dwarf_regnum() for arm64 Tengda Wu
2026-04-03 9:47 ` [PATCH v2 07/16] perf annotate-arm64: Implement extract_op_location() callback Tengda Wu
2026-04-07 7:26 ` Namhyung Kim
2026-04-03 9:47 ` [PATCH v2 08/16] perf annotate-arm64: Enable instruction tracking support Tengda Wu
2026-04-03 9:47 ` [PATCH v2 09/16] perf annotate-arm64: Support load instruction tracking Tengda Wu
2026-04-03 9:47 ` [PATCH v2 10/16] perf annotate-arm64: Support store " Tengda Wu
2026-04-03 9:47 ` [PATCH v2 11/16] perf annotate-arm64: Support stack variable tracking Tengda Wu
2026-04-03 9:47 ` [PATCH v2 12/16] perf annotate-arm64: Support 'mov' instruction tracking Tengda Wu
2026-04-03 9:47 ` [PATCH v2 13/16] perf annotate-arm64: Support 'add' " Tengda Wu
2026-04-03 9:47 ` [PATCH v2 14/16] perf annotate-arm64: Support 'adrp' instruction to track global variables Tengda Wu
2026-04-03 9:47 ` [PATCH v2 15/16] perf annotate-arm64: Support per-cpu variable access tracking Tengda Wu
2026-04-03 9:48 ` [PATCH v2 16/16] perf annotate-arm64: Support 'mrs' instruction to track 'current' pointer Tengda Wu
2026-04-07 6:31 ` [PATCH v2 00/16] perf arm64: Support data type profiling Namhyung Kim
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