From: Namhyung Kim <namhyung@kernel.org>
To: Tengda Wu <wutengda@huaweicloud.com>
Cc: james.clark@linaro.org, xueshuai@linux.alibaba.com,
Li Huafei <lihuafei1@huawei.com>,
Peter Zijlstra <peterz@infradead.org>,
leo.yan@linux.dev, Ian Rogers <irogers@google.com>,
Kim Phillips <kim.phillips@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Ingo Molnar <mingo@redhat.com>, Bill Wendling <morbo@google.com>,
Nick Desaulniers <nick.desaulniers+lkml@gmail.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Zecheng Li <zli94@ncsu.edu>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
llvm@lists.linux.dev
Subject: Re: [PATCH v3 03/21] perf llvm: Fix arm64 adrp instruction disassembly mismatch with objdump
Date: Wed, 8 Jul 2026 23:18:06 -0700 [thread overview]
Message-ID: <ak89Hg1SWnn0DHCk@z2> (raw)
In-Reply-To: <20260701035355.752944-4-wutengda@huaweicloud.com>
On Wed, Jul 01, 2026 at 03:53:37AM +0000, Tengda Wu wrote:
> The operands of 'adrp' instructions parsed by libllvm are currently
> represented as raw immediates rather than the "address <symbol+offset>"
> format used by objdump. This inconsistency causes arm64_mov__parse()
> to fail when parsing these instructions during post-processing.
>
> Example of the mismatch:
> Current: adrp x18, 8014
> Fix: adrp x18, ffff800081f5f000 <this_cpu_vector>
>
> Fix this by manually extracting the target address from the raw adrp
> instruction via symbol_lookup_callback(). The address is then converted
> to a specific symbol during symbol__disassemble_llvm() and formatted
> to match objdump's output, ensuring compatibility with existing
> parsers.
>
> Signed-off-by: Tengda Wu <wutengda@huaweicloud.com>
> ---
> tools/perf/util/llvm.c | 50 ++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/tools/perf/util/llvm.c b/tools/perf/util/llvm.c
> index a0deb742a733..533d47e8084d 100644
> --- a/tools/perf/util/llvm.c
> +++ b/tools/perf/util/llvm.c
> @@ -94,6 +94,7 @@ static void init_llvm(void)
> struct symbol_lookup_storage {
> u64 branch_addr;
> u64 pcrel_load_addr;
> + u64 pcrel_adrp_addr;
> };
>
> static const char *
> @@ -108,6 +109,18 @@ symbol_lookup_callback(void *disinfo, uint64_t value,
> storage->branch_addr = value;
> else if (*ref_type == LLVMDisassembler_ReferenceType_In_PCrel_Load)
> storage->pcrel_load_addr = value;
Is this used by arm64? If not, would be possible to reuse
pcrel_load_addr unless it'd complicate the code significantly?
I think it's the common concept of PC-relative addressing while it
requires two instructions to set up the final address on arm64.
Thanks,
Namhyung
> + else if (*ref_type == LLVMDisassembler_ReferenceType_In_ARM64_ADRP) {
> + uint64_t adrp_imm;
> +
> + /* immhi (bits 23:5) and immlo (bits 30:29) */
> + adrp_imm = ((value & 0x00ffffe0) >> 3) | ((value >> 29) & 0x3);
> + /* Sign-extend the 21-bit immediate to 64-bit */
> + if (adrp_imm & (1ULL << 20))
> + adrp_imm |= ~((1ULL << 21) - 1);
> +
> + /* Calculate the target page address */
> + storage->pcrel_adrp_addr = (address & ~0xFFFLL) + (adrp_imm << 12);
> + }
> *ref_type = LLVMDisassembler_ReferenceType_InOut_None;
> return NULL;
> }
> @@ -204,6 +217,7 @@ int symbol__disassemble_llvm(const char *filename, struct symbol *sym,
>
> storage.branch_addr = 0;
> storage.pcrel_load_addr = 0;
> + storage.pcrel_adrp_addr = 0;
>
> /*
> * LLVM's API has the code be disassembled as non-const, cast
> @@ -227,6 +241,42 @@ int symbol__disassemble_llvm(const char *filename, struct symbol *sym,
> free(name);
> }
> }
> + if (storage.pcrel_adrp_addr != 0) {
> + /*
> + * ADRP (Address Page) instructions encode a 21-bit signed
> + * immediate offset relative to the current PC's page.
> + *
> + * To maintain consistency with standard objdump output,
> + * we truncate the raw encoded immediate at the comma
> + * and replace it with the resolved absolute page address.
> + *
> + * Example conversion:
> + * From: adrp x18, 8014
> + * To: adrp x18, ffff800081f5f000 <this_cpu_vector>
> + */
> + char *name;
> + char *s = strchr(disasm_buf, ',');
> +
> + if (s == NULL)
> + goto err;
> +
> + s++;
> + *s = '\0';
> + disasm_len = strlen(disasm_buf);
> + disasm_len += scnprintf(disasm_buf + disasm_len,
> + sizeof(disasm_buf) - disasm_len,
> + " %"PRIx64,
> + storage.pcrel_adrp_addr);
> + name = llvm_name_for_data(dso, filename,
> + storage.pcrel_adrp_addr);
> + if (name) {
> + disasm_len += scnprintf(disasm_buf + disasm_len,
> + sizeof(disasm_buf) -
> + disasm_len,
> + " <%s>", name);
> + free(name);
> + }
> + }
> if (storage.pcrel_load_addr != 0) {
> char *name = llvm_name_for_data(dso, filename,
> storage.pcrel_load_addr);
> --
> 2.34.1
>
next prev parent reply other threads:[~2026-07-09 6:18 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 3:53 [PATCH v3 00/21] perf arm64: Support data type profiling Tengda Wu
2026-07-01 3:53 ` [PATCH v3 01/21] perf capstone: Fix kernel map reference count leak Tengda Wu
2026-07-09 5:57 ` Namhyung Kim
2026-07-10 21:49 ` Namhyung Kim
2026-07-01 3:53 ` [PATCH v3 02/21] perf capstone: Fix arm64 jump/adrp disassembly mismatch with objdump Tengda Wu
2026-07-01 3:53 ` [PATCH v3 03/21] perf llvm: Fix arm64 adrp instruction " Tengda Wu
2026-07-09 6:18 ` Namhyung Kim [this message]
2026-07-09 7:49 ` Tengda Wu
2026-07-01 3:53 ` [PATCH v3 04/21] perf annotate-arm64: Generalize arm64_mov__parse to support more instructions Tengda Wu
2026-07-01 3:53 ` [PATCH v3 05/21] perf annotate-arm64: Handle load and store instructions Tengda Wu
2026-07-01 3:53 ` [PATCH v3 06/21] perf dwarf-regs: Adapt get_dwarf_regnum() for arm64 Tengda Wu
2026-07-01 3:53 ` [PATCH v3 07/21] perf annotate: Adapt arch__dwarf_regnum() " Tengda Wu
2026-07-01 3:53 ` [PATCH v3 08/21] perf annotate: Introduce extract_op_location callback for arch-specific parsing Tengda Wu
2026-07-01 3:53 ` [PATCH v3 09/21] perf annotate-arm64: Implement extract_op_location() callback Tengda Wu
2026-07-01 3:53 ` [PATCH v3 10/21] perf annotate: Deduplicate overlapping ARM SPE events for data type profiling Tengda Wu
2026-07-01 3:53 ` [PATCH v3 11/21] perf auxtrace: Set default period to 1 for PERF_ITRACE_PERIOD_INSTRUCTIONS type Tengda Wu
2026-07-01 3:53 ` [PATCH v3 12/21] perf annotate-data: Extract invalidate_reg_state() as a common helper Tengda Wu
2026-07-01 3:53 ` [PATCH v3 13/21] perf annotate-arm64: Enable instruction tracking support Tengda Wu
2026-07-01 3:53 ` [PATCH v3 14/21] perf annotate-arm64: Support load instruction tracking Tengda Wu
2026-07-01 3:53 ` [PATCH v3 15/21] perf annotate-arm64: Support store " Tengda Wu
2026-07-01 3:53 ` [PATCH v3 16/21] perf annotate-arm64: Support stack variable tracking Tengda Wu
2026-07-01 3:53 ` [PATCH v3 17/21] perf annotate-arm64: Support 'mov' instruction tracking Tengda Wu
2026-07-01 3:53 ` [PATCH v3 18/21] perf annotate-arm64: Support 'add' " Tengda Wu
2026-07-01 3:53 ` [PATCH v3 19/21] perf annotate-arm64: Support 'adrp' instruction to track global variables Tengda Wu
2026-07-09 7:31 ` Namhyung Kim
2026-07-09 7:42 ` Tengda Wu
2026-07-01 3:53 ` [PATCH v3 20/21] perf annotate-arm64: Support per-cpu variable access tracking Tengda Wu
2026-07-09 7:29 ` Namhyung Kim
2026-07-01 3:53 ` [PATCH v3 21/21] perf annotate-arm64: Support 'mrs' instruction to track 'current' pointer Tengda Wu
2026-07-09 5:54 ` [PATCH v3 00/21] perf arm64: Support data type profiling Namhyung Kim
2026-07-09 8:01 ` Tengda Wu
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