[PATCH v2 1/2] LoongArch: Add flush_icache_all()/local_flush_icache_all()

Youling Tang
2026-04-05T02:13:35Z

From: Youling Tang <tangyouling@kylinos.cn>

LoongArch maintains ICache/DCache coherency by hardware,
we just need "ibar 0" to avoid instruction hazard here.

Signed-off-by: Youling Tang <tangyouling@kylinos.cn>
---
arch/loongarch/include/asm/cacheflush.h | 16 +++++++++++++++-
arch/loongarch/mm/cache.c | 10 ----------
2 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/arch/loongarch/include/asm/cacheflush.h b/arch/loongarch/include/asm/cacheflush.h
index f8754d08a31a..95416e788d2a 100644
--- a/arch/loongarch/include/asm/cacheflush.h
+++ b/arch/loongarch/include/asm/cacheflush.h
@@ -32,8 +32,22 @@ static inline unsigned int cpu_last_level_cache_line_size(void)
}

asmlinkage void __flush_cache_all(void);
-void local_flush_icache_range(unsigned long start, unsigned long end);

+/*
+ * LoongArch maintains ICache/DCache coherency by hardware,
+ * we just need "ibar" to avoid instruction hazard here.
+ */
+static inline void local_flush_icache_all(void)
+{
+ asm volatile ("ibar\t0\n"::);;
+}
+
+static inline void local_flush_icache_range(unsigned long start, unsigned long end)
+{
+ asm volatile ("ibar\t0\n"::);;
+}
+
+#define flush_icache_all local_flush_icache_all
#define flush_icache_range local_flush_icache_range
#define flush_icache_user_range local_flush_icache_range

diff --git a/arch/loongarch/mm/cache.c b/arch/loongarch/mm/cache.c
index 496916845ff7..06dc570eb429 100644
--- a/arch/loongarch/mm/cache.c
+++ b/arch/loongarch/mm/cache.c
@@ -31,16 +31,6 @@ void cache_error_setup(void)
set_merr_handler(0x0, &except_vec_cex, 0x80);
}

-/*
- * LoongArch maintains ICache/DCache coherency by hardware,
- * we just need "ibar" to avoid instruction hazard here.
- */
-void local_flush_icache_range(unsigned long start, unsigned long end)
-{
- asm volatile ("\tibar 0\n"::);
-}
-EXPORT_SYMBOL(local_flush_icache_range);
-
static void flush_cache_leaf(unsigned int leaf)
{
int i, j, nr_nodes;
--
2.43.0