* [LTP] [PATCH] syscalls/splice02: Reduce size of the input sequence
@ 2016-08-17 13:27 Yuriy Kolerov
2016-08-18 11:13 ` Cyril Hrubis
0 siblings, 1 reply; 2+ messages in thread
From: Yuriy Kolerov @ 2016-08-17 13:27 UTC (permalink / raw)
To: ltp
This test may take a lot of time on slow FPGA-based targets. Size of
the generated sequence may be reduced from 1-10000000 to seq 1-20000
and in bytes it is still more than SPLICE_SIZE constant from splice02.c:
#define SPLICE_SIZE (64*1024)
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
---
runtest/syscalls | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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^ permalink raw reply [flat|nested] 2+ messages in thread
* [LTP] [PATCH] syscalls/splice02: Reduce size of the input sequence
2016-08-17 13:27 [LTP] [PATCH] syscalls/splice02: Reduce size of the input sequence Yuriy Kolerov
@ 2016-08-18 11:13 ` Cyril Hrubis
0 siblings, 0 replies; 2+ messages in thread
From: Cyril Hrubis @ 2016-08-18 11:13 UTC (permalink / raw)
To: ltp
Hi!
> This test may take a lot of time on slow FPGA-based targets. Size of
> the generated sequence may be reduced from 1-10000000 to seq 1-20000
> and in bytes it is still more than SPLICE_SIZE constant from splice02.c:
>
> #define SPLICE_SIZE (64*1024)
Good catch. It's quite useless to feed the test with more than 64KB and
the seq 1-20000 produces about 100KB.
Pushed, thanks.
--
Cyril Hrubis
chrubis@suse.cz
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