From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from picard.linux.it (picard.linux.it [213.254.12.146]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9BFCEEC01CB for ; Mon, 23 Mar 2026 10:56:35 +0000 (UTC) Received: from picard.linux.it (localhost [IPv6:::1]) by picard.linux.it (Postfix) with ESMTP id 00BD23E229B for ; Mon, 23 Mar 2026 11:56:34 +0100 (CET) Received: from in-3.smtp.seeweb.it (in-3.smtp.seeweb.it [217.194.8.3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by picard.linux.it (Postfix) with ESMTPS id 8D6023C23AC for ; Mon, 23 Mar 2026 11:56:15 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by in-3.smtp.seeweb.it (Postfix) with ESMTPS id 2B22B1A009B8 for ; Mon, 23 Mar 2026 11:56:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774263374; x=1805799374; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=tZ65NupKuHSf7AnZdnbsdeRMdCJDlhaTgGPBWlsmZQE=; b=Y9KKTKUBhpA2Q/rDxWP2fVVmCaeUagX+SIPHCrHT1pRgD1nyPLWXnTtA w8cF1SEDO97UZoMKcqnxMILSmTo19HfSvsoD1DpKwq5VtJAUmvQWV1FcV Gia4RNXoJ7+WdraJJIY0FjFXUrARHz6mFdzffpl6F7eV/6KNIcRRgXVsG pkuEdOFvxIhupRed9paOW9UFOLKVA4wh3IsxfqFNYCbuoYr2Odq3pa5Xb ctFJ4SDfsB110jmNZcTu6IEWZm8DTSmkQMBnhlojE21h0vcWFbOnRYpBz 2b9MeuTZcuYktVbjlIAfldYZpxZrycDbVKguJ1ACMX53AQ6MBS5jF0T20 A==; X-CSE-ConnectionGUID: qV7qKHYPS8qOYqElQMY81Q== X-CSE-MsgGUID: XZ9hNUpuRrSFBUPfeETKHg== X-IronPort-AV: E=McAfee;i="6800,10657,11737"; a="92637387" X-IronPort-AV: E=Sophos;i="6.23,137,1770624000"; d="scan'208";a="92637387" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2026 03:56:10 -0700 X-CSE-ConnectionGUID: XaaXhDPiQZ6sifjmJ23aUg== X-CSE-MsgGUID: 1Bk5hb5rRimp7s+gjQcWqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,137,1770624000"; d="scan'208";a="247019143" Received: from pkubaj-desk.igk.intel.com (HELO intel.com) ([10.217.160.221]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2026 03:56:08 -0700 From: Piotr Kubaj To: ltp@lists.linux.it Date: Mon, 23 Mar 2026 11:54:08 +0100 Message-ID: <20260323105407.185357-2-piotr.kubaj@intel.com> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 1.0.9 at in-3.smtp.seeweb.it X-Virus-Status: Clean Subject: [LTP] [PATCH v5] high_freq_hwp_cap_cppc.c: new test X-BeenThere: ltp@lists.linux.it X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux Test Project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: helena.anna.dubel@intel.com, tomasz.ossowski@intel.com, rafael.j.wysocki@intel.com, daniel.niestepski@intel.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: ltp-bounces+ltp=archiver.kernel.org@lists.linux.it Sender: "ltp" Verify for all online logical CPUs that their highest performance value are the same for HWP Capability MSR 0x771 and CPPC sysfs file. Signed-off-by: Piotr Kubaj --- Address feedback with some changes: - access() returns -1 on error, - it also sets errno, so use that. online check is excluded for cpu0 since it's always online. runtest/power_management_tests | 1 + testcases/kernel/power_management/.gitignore | 1 + .../power_management/high_freq_hwp_cap_cppc.c | 84 +++++++++++++++++++ 3 files changed, 86 insertions(+) create mode 100644 testcases/kernel/power_management/high_freq_hwp_cap_cppc.c diff --git a/runtest/power_management_tests b/runtest/power_management_tests index 884e615cd..6d87dfb7f 100644 --- a/runtest/power_management_tests +++ b/runtest/power_management_tests @@ -1,4 +1,5 @@ #POWER_MANAGEMENT +high_freq_hwp_cap_cppc high_freq_hwp_cap_cppc runpwtests01 runpwtests01.sh runpwtests02 runpwtests02.sh runpwtests03 runpwtests03.sh diff --git a/testcases/kernel/power_management/.gitignore b/testcases/kernel/power_management/.gitignore index 0c2a3ed4b..c13bca1c4 100644 --- a/testcases/kernel/power_management/.gitignore +++ b/testcases/kernel/power_management/.gitignore @@ -1 +1,2 @@ +high_freq_hwp_cap_cppc pm_get_sched_values diff --git a/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c b/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c new file mode 100644 index 000000000..648547f1c --- /dev/null +++ b/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2026 Intel - http://www.intel.com/ + */ + +/*\ + * Verify for all online logical CPUs that their highest performance value are + * the same for HWP Capability MSR 0x771 and CPPC sysfs file. + */ + +#include "tst_test.h" +#include "tst_safe_prw.h" + +static int nproc; + +static void setup(void) +{ + nproc = tst_ncpus(); +} + +static void run(void) +{ + bool status = true; + + for (int i = 0; i < nproc; i++) { + bool online = false; + char path[PATH_MAX]; + unsigned long long msr_highest_perf = 0, sysfs_highest_perf = 0; + + snprintf(path, sizeof(path), "/sys/devices/system/cpu/cpu%d/online", i); + if (i) + SAFE_FILE_SCANF(path, "%d", &online); + + if (!online) { + tst_res(TINFO, "CPU%d offline, skipping", i); + continue; + } + + snprintf(path, sizeof(path), "/sys/devices/system/cpu/cpu%d/acpi_cppc/highest_perf", i); + if (access(path, F_OK) == -1) { + tst_res(TCONF | TERRNO, "CPPC sysfs not available, skipping"); + return; + } + + SAFE_FILE_SCANF(path, "%llu", &sysfs_highest_perf); + tst_res(TDEBUG, "%s: %llu", path, sysfs_highest_perf); + + snprintf(path, sizeof(path), "/dev/cpu/%d/msr", i); + int fd = SAFE_OPEN(path, O_RDONLY); + + SAFE_PREAD(1, fd, &msr_highest_perf, sizeof(msr_highest_perf), 0x771); + msr_highest_perf &= (1ULL << 8) - 1; + tst_res(TDEBUG, "%s: %llu", path, msr_highest_perf); + + if (msr_highest_perf != sysfs_highest_perf) { + tst_res(TINFO, "cpu%d: sysfs=%llu MSR=%llu", + i, sysfs_highest_perf, msr_highest_perf); + status = false; + } + + SAFE_CLOSE(fd); + } + + if (status) + tst_res(TPASS, "Sysfs and MSR values are equal"); + else + tst_res(TFAIL, "Highest performance values differ between sysfs and MSR"); +} + +static struct tst_test test = { + .needs_kconfigs = (const char *const []) { + "CONFIG_ACPI_CPPC_LIB", + "CONFIG_X86_MSR", + NULL + }, + .needs_root = 1, + .setup = setup, + .supported_archs = (const char *const []) { + "x86", + "x86_64", + NULL + }, + .test_all = run +}; -- 2.47.3 --------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. 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