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Tue, 9 Jun 2026 10:26:28 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id rwsCKlTqJ2q1WwAAD6G6ig (envelope-from ); Tue, 09 Jun 2026 10:26:28 +0000 Date: Tue, 9 Jun 2026 12:26:18 +0200 From: Cyril Hrubis To: Piotr Kubaj Message-ID: References: <20260514093559.125070-2-piotr.kubaj@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260514093559.125070-2-piotr.kubaj@intel.com> X-Spamd-Result: default: False [-4.30 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; NEURAL_HAM_SHORT(-0.20)[-0.995]; MIME_GOOD(-0.10)[text/plain]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; MISSING_XM_UA(0.00)[]; TO_DN_SOME(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCVD_TLS_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.cz:s=susede2_rsa,suse.cz:s=susede2_ed25519]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_FIVE(0.00)[6]; RCVD_COUNT_TWO(0.00)[2]; URIBL_BLOCKED(0.00)[suse.cz:email,imap1.dmz-prg2.suse.org:helo]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[yuki.lan:mid, suse.cz:email, imap1.dmz-prg2.suse.org:helo] X-Virus-Scanned: clamav-milter 1.0.9 at in-3.smtp.seeweb.it X-Virus-Status: Clean Subject: Re: [LTP] [PATCH v13] high_freq_hwp_cap_cppc.c: new test X-BeenThere: ltp@lists.linux.it X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux Test Project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: daniel.niestepski@intel.com, tomasz.ossowski@intel.com, helena.anna.dubel@intel.com, rafael.j.wysocki@intel.com, ltp@lists.linux.it Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: ltp-bounces+ltp=archiver.kernel.org@lists.linux.it Sender: "ltp" Hi! > +#include "tst_test.h" > +#include "tst_safe_prw.h" > + > +#define MSR_HWP_CAPABILITIES 0x771 > +#define HIGHEST_PERF_MASK 0xFF > + > +static int nproc; > +static int fd = -1; > +static int *mismatch; > + > +static void setup(void) > +{ > + if (access("/dev/cpu/0/msr", F_OK) == -1) > + tst_brk(TCONF | TERRNO, "msr driver not loaded"); > + > + if (access("/sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf", F_OK) == -1) > + tst_brk(TCONF | TERRNO, "CPPC sysfs not available"); > + > + nproc = tst_ncpus_conf(); > + mismatch = SAFE_MALLOC(nproc * sizeof(int)); > +} > + > +static void cleanup(void) > +{ > + if (fd != -1) > + SAFE_CLOSE(fd); > + > + free(mismatch); > +} > + > +static void run(void) > +{ > + bool status = true; > + char path[PATH_MAX]; > + > + memset(mismatch, 0, nproc * sizeof(*mismatch)); > + > + for (int i = 0; i < nproc; i++) { > + int online = 1; > + unsigned long long msr_highest_perf = 0, sysfs_highest_perf = 0; > + > + if (i) { > + snprintf(path, sizeof(path), "/sys/devices/system/cpu/cpu%d/online", i); > + SAFE_FILE_SCANF(path, "%d", &online); > + } > + > + if (!online) { > + tst_res(TINFO, "CPU%d offline, skipping", i); > + continue; > + } > + > + snprintf(path, sizeof(path), "/sys/devices/system/cpu/cpu%d/acpi_cppc/highest_perf", i); > + SAFE_FILE_SCANF(path, "%llu", &sysfs_highest_perf); > + tst_res(TDEBUG, "%s: %llu", path, sysfs_highest_perf); > + > + snprintf(path, sizeof(path), "/dev/cpu/%d/msr", i); > + fd = SAFE_OPEN(path, O_RDONLY); > + > + SAFE_PREAD(1, fd, &msr_highest_perf, sizeof(msr_highest_perf), MSR_HWP_CAPABILITIES); If I run the test on AMD Ryzen I get EIO here. I suppose that we need to limit this test to a family of CPUs that match the MSR format we expect. -- Cyril Hrubis chrubis@suse.cz -- Mailing list info: https://lists.linux.it/listinfo/ltp