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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <4p4z5eyhpdhxzi36drhrmz6z7krupszddudg6c2baypkbnnj7t@nqcmk2wdntts> On Tue, Feb 27, 2024 at 12:32:44AM +0300, Serge Semin wrote: > On Mon, Feb 26, 2024 at 09:00:14PM +0530, Manivannan Sadhasivam wrote: > > On Mon, Feb 26, 2024 at 03:53:20PM +0300, Serge Semin wrote: > > > On Mon, Feb 26, 2024 at 05:07:27PM +0530, Manivannan Sadhasivam wrote: > > > > In the case of Hyper DMA (HDMA) present in DWC controllers, there is no way > > > > the drivers can auto detect the number of read/write channels as like its > > > > predecessor embedded DMA (eDMA). So the glue drivers making use of HDMA > > > > have to pass the channels count during probe. > > > > > > > > To accommodate that, let's skip finding the channels if the channels count > > > > were already passed by glue drivers. If the channels count passed were > > > > wrong in any form, then the existing sanity check will catch it. > > > > > > > > Suggested-by: Serge Semin > > > > Reviewed-by: Siddharth Vadapalli > > > > Signed-off-by: Manivannan Sadhasivam > > > > --- > > > > drivers/pci/controller/dwc/pcie-designware.c | 16 +++++++++------- > > > > 1 file changed, 9 insertions(+), 7 deletions(-) > > > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > > > > index 193fcd86cf93..ce273c3c5421 100644 > > > > --- a/drivers/pci/controller/dwc/pcie-designware.c > > > > +++ b/drivers/pci/controller/dwc/pcie-designware.c > > > > @@ -927,13 +927,15 @@ static int dw_pcie_edma_find_channels(struct dw_pcie *pci) > > > > { > > > > u32 val; > > > > > > > > - if (pci->edma.mf == EDMA_MF_EDMA_LEGACY) > > > > - val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL); > > > > - else > > > > - val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > > > > - > > > > - pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val); > > > > - pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val); > > > > > > > + if (!pci->edma.ll_wr_cnt || !pci->edma.ll_rd_cnt) { > > > > > > Are you sure that the partly initialized case should be considered as > > > a request for the auto-detection? IMO &&-ing here and letting the > > > sanity check to fail further would be more correct since thus the > > > developer would know about improper initialized data. > > > > > > > We already have the check below. So the partly initialized case will fail > > anyway. > > Not really. If the partly initialized case activates the > auto-detection procedure it will override both non-initialized and > _initialized_ number of channels with the values retrieved from the > hardware, which the glue driver has been willing not to use. This > prone to undefined behavior depending on the reasons of skipping the > auto-detection procedure. For instance, assume the DMA_CTRL register > reports an invalid number of read channels. A glue driver by mistake > or willingly overwrites the pci->edma.ll_rd_cnt field only. This won't > solve the problem since the auto-detection will be proceeded due to > the pci->edma.ll_wr_cnt field being left uninitialized. > > So to speak it would be better to implement a strictly determined case > for activating the auto-detection procedure: both number of channels > aren't initialized; if only one field is initialized then report an > error. > > Alternatively we can have the auto-detection executed on the > per-channel basis: > > + if (pci->edma.mf != EDMA_MF_HDMA_NATIVE) { > + val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > + > + if (!pci->edma.ll_wr_cnt) > + pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val); > + > + if (!pci->edma.ll_rd_cnt) > + pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val); > + } > Hmm, in this case there is no need to check for uninitialized channels count: /* * Autodetect the read/write channels count only for non-HDMA platforms. * HDMA platforms doesn't support autodetect, so the glue drivers should've * passed the valid count already. If not, the below sanity check will * catch it. */ if (pci->edma.mf != EDMA_MF_HDMA_NATIVE) { val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val); pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val); } /* Sanity check */ - Mani -- மணிவண்ணன் சதாசிவம்