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From: Bjorn Helgaas <helgaas@kernel.org>
To: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Johannes Berg" <johannes@sipsolutions.net>,
	"Jeff Johnson" <jjohnson@kernel.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev,
	linux-wireless@vger.kernel.org, ath11k@lists.infradead.org,
	quic_jjohnson@quicinc.com, quic_pyarlaga@quicinc.com,
	quic_vbadigan@quicinc.com, quic_vpernami@quicinc.com,
	quic_mrana@quicinc.com
Subject: Re: [PATCH 4/8] PCI: dwc: qcom: Update ICC & OPP votes based upon the requested speed
Date: Wed, 19 Feb 2025 12:27:46 -0600	[thread overview]
Message-ID: <20250219182746.GA226108@bhelgaas> (raw)
In-Reply-To: <f0e5efb7-8ea0-a064-21e4-6d7596b1a9ae@oss.qualcomm.com>

On Wed, Feb 19, 2025 at 11:28:47PM +0530, Krishna Chaitanya Chundru wrote:
> On 2/19/2025 3:37 AM, Bjorn Helgaas wrote:
> > On Mon, Feb 17, 2025 at 12:04:11PM +0530, Krishna Chaitanya Chundru wrote:
> > > QCOM PCIe controllers needs to disable ASPM before initiating link
> > > re-train. So as part of pre_bw_scale() disable ASPM and as part of
> > > post_scale_bus_bw() enable ASPM back.
> > 
> > s/needs/need/
> > 
> > Why does Qcom need to disable ASPM?  Is there a PCIe spec restriction
> > about this that should be applied to all PCIe host bridges?  Or is
> > this a Qcom defect?
> > 
> It is QCOM controller issue, PCIe spec doesn't mention to disable ASPM.

OK.  I'm a little concerned that disabling/enabling
PCIE_LINK_STATE_ALL might clobber preferences set by drivers of
downstream devices, but I guess ...

Maybe we could add a comment in the code about this being done to work
around some Qcom issue so that browsers of
pci_enable_link_state_locked() don't get the idea that this needs to
be done generically.

Bjorn

  reply	other threads:[~2025-02-19 18:27 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-17  6:34 [PATCH 0/8] bus: mhi: host: Add support for mhi bus bw Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 1/8] PCI: update current bus speed as part of pci_bus_add_devices() Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 2/8] PCI/bwctrl: Add support to scale bandwidth before & after link re-training Krishna Chaitanya Chundru
2025-02-17  9:28   ` Ilpo Järvinen
2025-02-19 17:57     ` Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 3/8] PCI: dwc: Implement .pre_scale_bus_bw() & .post_scale_bus_bw hook Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 4/8] PCI: dwc: qcom: Update ICC & OPP votes based upon the requested speed Krishna Chaitanya Chundru
2025-02-18  0:36   ` kernel test robot
2025-02-18 22:07   ` Bjorn Helgaas
2025-02-19 17:58     ` Krishna Chaitanya Chundru
2025-02-19 18:27       ` Bjorn Helgaas [this message]
2025-02-17  6:34 ` [PATCH 5/8] bus: mhi: host: Add support to read MHI capabilities Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 6/8] bus: mhi: host: Add support for Bandwidth scale Krishna Chaitanya Chundru
2025-02-17  9:17   ` Ilpo Järvinen
2025-02-19 18:02     ` Krishna Chaitanya Chundru
2025-02-17 10:55   ` kernel test robot
2025-02-17  6:34 ` [PATCH 7/8] PCI: Make pcie_link_speed variable public & export pci_set_target_speed() Krishna Chaitanya Chundru
2025-02-19 17:36   ` Jeff Johnson
2025-02-17  6:34 ` [PATCH 8/8] wifi: ath11k: add support for MHI bandwidth scaling Krishna Chaitanya Chundru

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