From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0C2D36604E for ; Fri, 3 Apr 2026 06:42:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775198521; cv=none; b=AXOAX1WEQT/tThDxpRE33oR9mdxHDjYNHqbl1gy+e0/3ZRw30qZsQmhQJ2mkinI82uwRxW7V4YvGQH3jCDCU0C/Pb+2Id7Ldh1+YXgUrTPUp1EvoBRY17UU9gBfnXB6ObjlYAfv3ceFIHz92vKf5iO/0diFAshNShNDK46EBIEg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775198521; c=relaxed/simple; bh=X8J7DV5ZTLz71vNZCfYmIt0uW7AWI8Qwl0mSkftTGlU=; h=Date:To:From:Subject:Message-Id; b=iQtp7xBkFCP8ghPjPK81AxKmAoZ95k6sCyjxZvsnSpBc6DSAayKbCWaqQJ+NX7z4HKw03s9XDBwkN7ZIJs9jM3Gutp/3m+FwbCQb3l73OsZKZfNYNqQUEQEXHv6BeCGydtRWHIYgVaB6T5E7sYOXdvc0P+RTRjQXuHPFgDYJqCc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux-foundation.org header.i=@linux-foundation.org header.b=aboipE32; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux-foundation.org header.i=@linux-foundation.org header.b="aboipE32" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B39FBC4CEF7; Fri, 3 Apr 2026 06:42:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux-foundation.org; s=korg; t=1775198520; bh=X8J7DV5ZTLz71vNZCfYmIt0uW7AWI8Qwl0mSkftTGlU=; h=Date:To:From:Subject:From; b=aboipE32c77huA9RnCiI4CdRhnLCp5UJTEp16xvzXxkwsi1T1hjfbKEmEaRDLqeXh xxCFradM4TflAUAuNb1suGF4J/Ck6FJBJB4ewNg4eL7u4n5ZCmlOPq/ToA2Mtdhttj PCilWJcgrMwFk521z2zSl+317R8mg4MqwykelIHM= Date: Thu, 02 Apr 2026 23:42:00 -0700 To: mm-commits@vger.kernel.org,will@kernel.org,tytso@mit.edu,svens@linux.ibm.com,song@kernel.org,richard@nod.at,richard.henderson@linaro.org,palmer@dabbelt.com,npiggin@gmail.com,mpe@ellerman.id.au,mingo@redhat.com,mattst88@gmail.com,maddy@linux.ibm.com,linux@armlinux.org.uk,linmag7@gmail.com,linan122@huawei.com,kernel@xen0n.name,johannes@sipsolutions.net,jason@zx2c4.com,hpa@zytor.com,herbert@gondor.apana.org.au,hca@linux.ibm.com,gor@linux.ibm.com,ebiggers@kernel.org,dsterba@suse.com,davem@davemloft.net,dan.j.williams@intel.com,clm@fb.com,chenhuacai@kernel.org,catalin.marinas@arm.com,bp@alien8.de,borntraeger@linux.ibm.com,arnd@arndb.de,ardb@kernel.org,aou@eecs.berkeley.edu,anton.ivanov@cambridgegreys.com,andreas@gaisler.com,alex@ghiti.fr,agordeev@linux.ibm.com,hch@lst.de,akpm@linux-foundation.org From: Andrew Morton Subject: [merged mm-nonmm-stable] s390-move-the-xor-code-to-lib-raid.patch removed from -mm tree Message-Id: <20260403064200.B39FBC4CEF7@smtp.kernel.org> Precedence: bulk X-Mailing-List: mm-commits@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The quilt patch titled Subject: s390: move the XOR code to lib/raid/ has been removed from the -mm tree. Its filename was s390-move-the-xor-code-to-lib-raid.patch This patch was dropped because it was merged into the mm-nonmm-stable branch of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm ------------------------------------------------------ From: Christoph Hellwig Subject: s390: move the XOR code to lib/raid/ Date: Fri, 27 Mar 2026 07:16:50 +0100 Move the optimized XOR into lib/raid and include it it in xor.ko instead of unconditionally building it into the main kernel image. Link: https://lkml.kernel.org/r/20260327061704.3707577-19-hch@lst.de Signed-off-by: Christoph Hellwig Acked-by: Heiko Carstens Reviewed-by: Eric Biggers Tested-by: Eric Biggers Cc: Albert Ou Cc: Alexander Gordeev Cc: Alexandre Ghiti Cc: Andreas Larsson Cc: Anton Ivanov Cc: Ard Biesheuvel Cc: Arnd Bergmann Cc: "Borislav Petkov (AMD)" Cc: Catalin Marinas Cc: Chris Mason Cc: Christian Borntraeger Cc: Dan Williams Cc: David S. Miller Cc: David Sterba Cc: Herbert Xu Cc: "H. Peter Anvin" Cc: Huacai Chen Cc: Ingo Molnar Cc: Jason A. Donenfeld Cc: Johannes Berg Cc: Li Nan Cc: Madhavan Srinivasan Cc: Magnus Lindholm Cc: Matt Turner Cc: Michael Ellerman Cc: Nicholas Piggin Cc: Palmer Dabbelt Cc: Richard Henderson Cc: Richard Weinberger Cc: Russell King Cc: Song Liu Cc: Sven Schnelle Cc: Ted Ts'o Cc: Vasily Gorbik Cc: WANG Xuerui Cc: Will Deacon Signed-off-by: Andrew Morton --- arch/s390/lib/Makefile | 2 arch/s390/lib/xor.c | 136 -------------------------------------- lib/raid/xor/Makefile | 1 lib/raid/xor/s390/xor.c | 134 +++++++++++++++++++++++++++++++++++++ 4 files changed, 136 insertions(+), 137 deletions(-) --- a/arch/s390/lib/Makefile~s390-move-the-xor-code-to-lib-raid +++ a/arch/s390/lib/Makefile @@ -5,7 +5,7 @@ lib-y += delay.o string.o uaccess.o find.o spinlock.o tishift.o lib-y += csum-partial.o -obj-y += mem.o xor.o +obj-y += mem.o lib-$(CONFIG_KPROBES) += probes.o lib-$(CONFIG_UPROBES) += probes.o obj-$(CONFIG_S390_KPROBES_SANITY_TEST) += test_kprobes_s390.o diff --git a/arch/s390/lib/xor.c a/arch/s390/lib/xor.c deleted file mode 100644 --- a/arch/s390/lib/xor.c +++ /dev/null @@ -1,136 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Optimized xor_block operation for RAID4/5 - * - * Copyright IBM Corp. 2016 - * Author(s): Martin Schwidefsky - */ - -#include -#include -#include -#include - -static void xor_xc_2(unsigned long bytes, unsigned long * __restrict p1, - const unsigned long * __restrict p2) -{ - asm volatile( - " aghi %0,-1\n" - " jm 3f\n" - " srlg 0,%0,8\n" - " ltgr 0,0\n" - " jz 1f\n" - "0: xc 0(256,%1),0(%2)\n" - " la %1,256(%1)\n" - " la %2,256(%2)\n" - " brctg 0,0b\n" - "1: exrl %0,2f\n" - " j 3f\n" - "2: xc 0(1,%1),0(%2)\n" - "3:" - : "+a" (bytes), "+a" (p1), "+a" (p2) - : : "0", "cc", "memory"); -} - -static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1, - const unsigned long * __restrict p2, - const unsigned long * __restrict p3) -{ - asm volatile( - " aghi %0,-1\n" - " jm 4f\n" - " srlg 0,%0,8\n" - " ltgr 0,0\n" - " jz 1f\n" - "0: xc 0(256,%1),0(%2)\n" - " xc 0(256,%1),0(%3)\n" - " la %1,256(%1)\n" - " la %2,256(%2)\n" - " la %3,256(%3)\n" - " brctg 0,0b\n" - "1: exrl %0,2f\n" - " exrl %0,3f\n" - " j 4f\n" - "2: xc 0(1,%1),0(%2)\n" - "3: xc 0(1,%1),0(%3)\n" - "4:" - : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3) - : : "0", "cc", "memory"); -} - -static void xor_xc_4(unsigned long bytes, unsigned long * __restrict p1, - const unsigned long * __restrict p2, - const unsigned long * __restrict p3, - const unsigned long * __restrict p4) -{ - asm volatile( - " aghi %0,-1\n" - " jm 5f\n" - " srlg 0,%0,8\n" - " ltgr 0,0\n" - " jz 1f\n" - "0: xc 0(256,%1),0(%2)\n" - " xc 0(256,%1),0(%3)\n" - " xc 0(256,%1),0(%4)\n" - " la %1,256(%1)\n" - " la %2,256(%2)\n" - " la %3,256(%3)\n" - " la %4,256(%4)\n" - " brctg 0,0b\n" - "1: exrl %0,2f\n" - " exrl %0,3f\n" - " exrl %0,4f\n" - " j 5f\n" - "2: xc 0(1,%1),0(%2)\n" - "3: xc 0(1,%1),0(%3)\n" - "4: xc 0(1,%1),0(%4)\n" - "5:" - : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4) - : : "0", "cc", "memory"); -} - -static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1, - const unsigned long * __restrict p2, - const unsigned long * __restrict p3, - const unsigned long * __restrict p4, - const unsigned long * __restrict p5) -{ - asm volatile( - " aghi %0,-1\n" - " jm 6f\n" - " srlg 0,%0,8\n" - " ltgr 0,0\n" - " jz 1f\n" - "0: xc 0(256,%1),0(%2)\n" - " xc 0(256,%1),0(%3)\n" - " xc 0(256,%1),0(%4)\n" - " xc 0(256,%1),0(%5)\n" - " la %1,256(%1)\n" - " la %2,256(%2)\n" - " la %3,256(%3)\n" - " la %4,256(%4)\n" - " la %5,256(%5)\n" - " brctg 0,0b\n" - "1: exrl %0,2f\n" - " exrl %0,3f\n" - " exrl %0,4f\n" - " exrl %0,5f\n" - " j 6f\n" - "2: xc 0(1,%1),0(%2)\n" - "3: xc 0(1,%1),0(%3)\n" - "4: xc 0(1,%1),0(%4)\n" - "5: xc 0(1,%1),0(%5)\n" - "6:" - : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4), - "+a" (p5) - : : "0", "cc", "memory"); -} - -struct xor_block_template xor_block_xc = { - .name = "xc", - .do_2 = xor_xc_2, - .do_3 = xor_xc_3, - .do_4 = xor_xc_4, - .do_5 = xor_xc_5, -}; -EXPORT_SYMBOL(xor_block_xc); --- a/lib/raid/xor/Makefile~s390-move-the-xor-code-to-lib-raid +++ a/lib/raid/xor/Makefile @@ -20,6 +20,7 @@ xor-$(CONFIG_ALTIVEC) += powerpc/xor_vm xor-$(CONFIG_RISCV_ISA_V) += riscv/xor.o riscv/xor-glue.o xor-$(CONFIG_SPARC32) += sparc/xor-sparc32.o xor-$(CONFIG_SPARC64) += sparc/xor-sparc64.o sparc/xor-sparc64-glue.o +xor-$(CONFIG_S390) += s390/xor.o CFLAGS_arm/xor-neon.o += $(CC_FLAGS_FPU) diff --git a/lib/raid/xor/s390/xor.c a/lib/raid/xor/s390/xor.c new file mode 100664 --- /dev/null +++ a/lib/raid/xor/s390/xor.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Optimized xor_block operation for RAID4/5 + * + * Copyright IBM Corp. 2016 + * Author(s): Martin Schwidefsky + */ + +#include +#include +#include + +static void xor_xc_2(unsigned long bytes, unsigned long * __restrict p1, + const unsigned long * __restrict p2) +{ + asm volatile( + " aghi %0,-1\n" + " jm 3f\n" + " srlg 0,%0,8\n" + " ltgr 0,0\n" + " jz 1f\n" + "0: xc 0(256,%1),0(%2)\n" + " la %1,256(%1)\n" + " la %2,256(%2)\n" + " brctg 0,0b\n" + "1: exrl %0,2f\n" + " j 3f\n" + "2: xc 0(1,%1),0(%2)\n" + "3:" + : "+a" (bytes), "+a" (p1), "+a" (p2) + : : "0", "cc", "memory"); +} + +static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1, + const unsigned long * __restrict p2, + const unsigned long * __restrict p3) +{ + asm volatile( + " aghi %0,-1\n" + " jm 4f\n" + " srlg 0,%0,8\n" + " ltgr 0,0\n" + " jz 1f\n" + "0: xc 0(256,%1),0(%2)\n" + " xc 0(256,%1),0(%3)\n" + " la %1,256(%1)\n" + " la %2,256(%2)\n" + " la %3,256(%3)\n" + " brctg 0,0b\n" + "1: exrl %0,2f\n" + " exrl %0,3f\n" + " j 4f\n" + "2: xc 0(1,%1),0(%2)\n" + "3: xc 0(1,%1),0(%3)\n" + "4:" + : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3) + : : "0", "cc", "memory"); +} + +static void xor_xc_4(unsigned long bytes, unsigned long * __restrict p1, + const unsigned long * __restrict p2, + const unsigned long * __restrict p3, + const unsigned long * __restrict p4) +{ + asm volatile( + " aghi %0,-1\n" + " jm 5f\n" + " srlg 0,%0,8\n" + " ltgr 0,0\n" + " jz 1f\n" + "0: xc 0(256,%1),0(%2)\n" + " xc 0(256,%1),0(%3)\n" + " xc 0(256,%1),0(%4)\n" + " la %1,256(%1)\n" + " la %2,256(%2)\n" + " la %3,256(%3)\n" + " la %4,256(%4)\n" + " brctg 0,0b\n" + "1: exrl %0,2f\n" + " exrl %0,3f\n" + " exrl %0,4f\n" + " j 5f\n" + "2: xc 0(1,%1),0(%2)\n" + "3: xc 0(1,%1),0(%3)\n" + "4: xc 0(1,%1),0(%4)\n" + "5:" + : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4) + : : "0", "cc", "memory"); +} + +static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1, + const unsigned long * __restrict p2, + const unsigned long * __restrict p3, + const unsigned long * __restrict p4, + const unsigned long * __restrict p5) +{ + asm volatile( + " aghi %0,-1\n" + " jm 6f\n" + " srlg 0,%0,8\n" + " ltgr 0,0\n" + " jz 1f\n" + "0: xc 0(256,%1),0(%2)\n" + " xc 0(256,%1),0(%3)\n" + " xc 0(256,%1),0(%4)\n" + " xc 0(256,%1),0(%5)\n" + " la %1,256(%1)\n" + " la %2,256(%2)\n" + " la %3,256(%3)\n" + " la %4,256(%4)\n" + " la %5,256(%5)\n" + " brctg 0,0b\n" + "1: exrl %0,2f\n" + " exrl %0,3f\n" + " exrl %0,4f\n" + " exrl %0,5f\n" + " j 6f\n" + "2: xc 0(1,%1),0(%2)\n" + "3: xc 0(1,%1),0(%3)\n" + "4: xc 0(1,%1),0(%4)\n" + "5: xc 0(1,%1),0(%5)\n" + "6:" + : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4), + "+a" (p5) + : : "0", "cc", "memory"); +} + +struct xor_block_template xor_block_xc = { + .name = "xc", + .do_2 = xor_xc_2, + .do_3 = xor_xc_3, + .do_4 = xor_xc_4, + .do_5 = xor_xc_5, +}; _ Patches currently in -mm which might be from hch@lst.de are