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Thu, 30 Apr 2026 04:27:20 -0700 (PDT) Received: from [192.168.88.32] ([150.228.93.27]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-447b3d48517sm10934692f8f.5.2026.04.30.04.27.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 30 Apr 2026 04:27:20 -0700 (PDT) Message-ID: <0060104c-bb38-45d5-8f8e-14708702feac@redhat.com> Date: Thu, 30 Apr 2026 13:27:19 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net] net: phy: micrel: fix LAN8814 QSGMII soft reset To: Robert Marko , andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, Divya.Koppera@microchip.com, horatiu.vultur@microchip.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260428134138.1741253-1-robert.marko@sartura.hr> Content-Language: en-US From: Paolo Abeni In-Reply-To: <20260428134138.1741253-1-robert.marko@sartura.hr> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 4/28/26 3:41 PM, Robert Marko wrote: > LAN8814 QSGMII soft reset was moved into the probe function to avoid > triggering it for each of 4 PHY-s in the package. > > However, that broke QSGMII link between the MAC and PHY on most LAN8814 > PHY-s, specificaly for us on the Microchip LAN969x switch. > Reading the QSGMII status registers it was visible that lanes were only > partially synced. > > It looks like the reset timing is crucial, so lets move the reset back > into the .config_init function but guard it with phy_package_init_once() > to avoid it being triggered on each of 4 PHY-s in the package. > Change the probe function to use phy_package_probe_once() for coma and PtP > setup. > > Fixes: 96a9178a29a6 ("net: phy: micrel: lan8814 fix reset of the QSGMII interface") > Signed-off-by: Robert Marko > --- > drivers/net/phy/micrel.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) > > diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c > index 2aa1dedd21b8..e211a523c258 100644 > --- a/drivers/net/phy/micrel.c > +++ b/drivers/net/phy/micrel.c > @@ -4548,6 +4548,13 @@ static int lan8814_config_init(struct phy_device *phydev) > struct kszphy_priv *lan8814 = phydev->priv; > int ret; > > + if (phy_package_init_once(phydev)) > + /* Reset the PHY */ > + lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, > + LAN8814_QSGMII_SOFT_RESET, > + LAN8814_QSGMII_SOFT_RESET_BIT, > + LAN8814_QSGMII_SOFT_RESET_BIT) Sashiko says: --- Could this introduce a race condition if multiple ports are brought up concurrently? Because phy_package_init_once() does not provide a synchronization barrier for followers, they might proceed immediately to configure their registers while the leader is still performing the reset. --- on top of my head IDK if such race is possible at all. /P