From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CFD414EC73 for ; Sun, 17 Aug 2025 16:04:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755446644; cv=none; b=iXcWZKakAZ9Vc5kvFoKQg7m5WTka+b20kvkIUNC5IeawOOW15R24mzI6VNB3wVwbrOmPyWowX5IbnXI8S3R8wvZKfpKnffID7i3Ms/ff06puyb0+w0dYQii+Nklg6A/9nsKXJH2hEkO9e4gyU0hbSc/oeXHnZns03Pw1oLviQss= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755446644; c=relaxed/simple; bh=R82MBbqb0Nrsf7+Eoct/6OFSTndAY4e18iqnimSRDrk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=BYSqJRh88COjojEd3OwJWZ+VbGN4CP5Mr4Yt67SiQE70IBKZ5YUKj2aG0GMa+xTAPsedw/mYPBjC8Kc3v5rR1VLJilbNiv3o7c8Rs5oQeg/DIXvId9n+q8IwPc3S9lQjGWK07SEmYrNTdUriCiOBUo9bwjEMvc5Txopv4t+iqO4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=XslvMXKX; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="XslvMXKX" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=zdE0R993uxA9LK/Gcm928RWFPyC6VX59/G/wYy8am1w=; b=XslvMXKX9PoOKnQ672hCHnJ0QD PXkmPDbUxNUDI5P4yT/3/8jpgr0KFsAb5Oyx2ihjRrCvKaWlomgGK3XLi0bMQpbFZzLQjPF7+urzx pJLMHL3IywQN1RwW4c9lXg/z+oiPo6YbvSOjCPU1XcQ9VnphR8LRyBwLWfGQhklD6eho=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1unfrK-004ybH-2n; Sun, 17 Aug 2025 18:03:50 +0200 Date: Sun, 17 Aug 2025 18:03:50 +0200 From: Andrew Lunn To: "Russell King (Oracle)" Cc: Heiner Kallweit , Alexandre Torgue , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Coquelin , netdev@vger.kernel.org, Paolo Abeni Subject: Re: [PATCH net-next 5/7] net: stmmac: use core wake IRQ support Message-ID: <00b45ff8-b5fa-4453-a389-a7252aa1da6d@lunn.ch> References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Fri, Aug 15, 2025 at 12:32:10PM +0100, Russell King (Oracle) wrote: > The PM core provides management of wake IRQs along side setting the > device wake enable state. In order to use this, we need to register > the interrupt used to wakeup the system using devm_pm_set_wake_irq() > or dev_pm_set_wake_irq(). The core will then enable or disable IRQ > wake state on this interrupt as appropriate, depending on the > device_set_wakeup_enable() state. device_set_wakeup_enable() does not > care about having balanced enable/disable calls. > > Make use of this functionality, rather than explicitly managing the > IRQ enable state in the set_wol() ethtool op. This removes the IRQ > wake state management from stmmac. > > Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn Andrew