From: Dave Jiang <dave.jiang@intel.com>
To: alejandro.lucero-palau@amd.com, linux-cxl@vger.kernel.org,
netdev@vger.kernel.org, dan.j.williams@intel.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com
Subject: Re: [PATCH v20 03/22] cxl/mem: Introduce a memdev creation ->probe() operation
Date: Thu, 13 Nov 2025 16:02:16 -0700 [thread overview]
Message-ID: <00fd29f9-ff62-4581-8e8d-5980fb22bf7c@intel.com> (raw)
In-Reply-To: <20251110153657.2706192-4-alejandro.lucero-palau@amd.com>
On 11/10/25 8:36 AM, alejandro.lucero-palau@amd.com wrote:
> From: Dan Williams <dan.j.williams@intel.com>
>
> Allow for a driver to pass a routine to be called in cxl_mem_probe()
> context. This ability mirrors the semantics of faux_device_create() and
> allows for the caller to run CXL-topology-attach dependent logic on behalf
> of the caller.
>
> This capability is needed for CXL accelerator device drivers that need to
> make decisions about enabling CXL dependent functionality in the device, or
> falling back to PCIe-only operation.
>
> The probe callback runs after the port topology is successfully attached
> for the given memdev.
>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
With your sign off tag added,
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> drivers/cxl/core/memdev.c | 5 ++++-
> drivers/cxl/core/pci_drv.c | 2 +-
> drivers/cxl/cxlmem.h | 9 ++++++++-
> drivers/cxl/mem.c | 27 +++++++++++++++++++++++++--
> drivers/cxl/private.h | 3 ++-
> tools/testing/cxl/test/mem.c | 2 +-
> 6 files changed, 41 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
> index 14b4601faf66..45b5714651d0 100644
> --- a/drivers/cxl/core/memdev.c
> +++ b/drivers/cxl/core/memdev.c
> @@ -1035,7 +1035,8 @@ static const struct file_operations cxl_memdev_fops = {
> .llseek = noop_llseek,
> };
>
> -struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds)
> +struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds,
> + const struct cxl_memdev_ops *ops)
> {
> struct cxl_memdev *cxlmd __free(kfree) =
> kzalloc(sizeof(*cxlmd), GFP_KERNEL);
> @@ -1052,6 +1053,8 @@ struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds)
> return ERR_PTR(rc);
> cxlmd->id = rc;
> cxlmd->depth = -1;
> + cxlmd->ops = ops;
> + cxlmd->endpoint = ERR_PTR(-ENXIO);
> cxlmd->cxlds = cxlds;
> cxlds->cxlmd = cxlmd;
>
> diff --git a/drivers/cxl/core/pci_drv.c b/drivers/cxl/core/pci_drv.c
> index bc3c959f7eb6..f43590062efd 100644
> --- a/drivers/cxl/core/pci_drv.c
> +++ b/drivers/cxl/core/pci_drv.c
> @@ -1007,7 +1007,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> if (rc)
> dev_dbg(&pdev->dev, "No CXL Features discovered\n");
>
> - cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds);
> + cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds, NULL);
> if (IS_ERR(cxlmd))
> return PTR_ERR(cxlmd);
>
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 434031a0c1f7..e55f52a5598d 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -34,6 +34,10 @@
> (FIELD_GET(CXLMDEV_RESET_NEEDED_MASK, status) != \
> CXLMDEV_RESET_NEEDED_NOT)
>
> +struct cxl_memdev_ops {
> + int (*probe)(struct cxl_memdev *cxlmd);
> +};
> +
> /**
> * struct cxl_memdev - CXL bus object representing a Type-3 Memory Device
> * @dev: driver core device object
> @@ -43,6 +47,7 @@
> * @cxl_nvb: coordinate removal of @cxl_nvd if present
> * @cxl_nvd: optional bridge to an nvdimm if the device supports pmem
> * @endpoint: connection to the CXL port topology for this memory device
> + * @ops: incremental caller specific probe routine
> * @id: id number of this memdev instance.
> * @depth: endpoint port depth
> * @scrub_cycle: current scrub cycle set for this device
> @@ -59,6 +64,7 @@ struct cxl_memdev {
> struct cxl_nvdimm_bridge *cxl_nvb;
> struct cxl_nvdimm *cxl_nvd;
> struct cxl_port *endpoint;
> + const struct cxl_memdev_ops *ops;
> int id;
> int depth;
> u8 scrub_cycle;
> @@ -96,7 +102,8 @@ static inline bool is_cxl_endpoint(struct cxl_port *port)
> }
>
> struct cxl_memdev *devm_cxl_add_memdev(struct device *host,
> - struct cxl_dev_state *cxlds);
> + struct cxl_dev_state *cxlds,
> + const struct cxl_memdev_ops *ops);
> int devm_cxl_sanitize_setup_notifier(struct device *host,
> struct cxl_memdev *cxlmd);
> struct cxl_memdev_state;
> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> index 01a8e808196e..ebe17fb6bb82 100644
> --- a/drivers/cxl/mem.c
> +++ b/drivers/cxl/mem.c
> @@ -144,6 +144,12 @@ static int cxl_mem_probe(struct device *dev)
> return rc;
> }
>
> + if (cxlmd->ops) {
> + rc = cxlmd->ops->probe(cxlmd);
> + if (rc)
> + return rc;
> + }
> +
> rc = devm_cxl_memdev_edac_register(cxlmd);
> if (rc)
> dev_dbg(dev, "CXL memdev EDAC registration failed rc=%d\n", rc);
> @@ -178,15 +184,17 @@ DEFINE_FREE(cxlmd_free, struct cxl_memdev *, __cxlmd_free(_T))
> * devm_cxl_add_memdev - Add a CXL memory device
> * @host: devres alloc/release context and parent for the memdev
> * @cxlds: CXL device state to associate with the memdev
> + * @ops: optional operations to run in cxl_mem::{probe,remove}() context
> *
> * Upon return the device will have had a chance to attach to the
> * cxl_mem driver, but may fail if the CXL topology is not ready
> * (hardware CXL link down, or software platform CXL root not attached)
> */
> struct cxl_memdev *devm_cxl_add_memdev(struct device *host,
> - struct cxl_dev_state *cxlds)
> + struct cxl_dev_state *cxlds,
> + const struct cxl_memdev_ops *ops)
> {
> - struct cxl_memdev *cxlmd __free(cxlmd_free) = cxl_memdev_alloc(cxlds);
> + struct cxl_memdev *cxlmd __free(cxlmd_free) = cxl_memdev_alloc(cxlds, ops);
> int rc;
>
> if (IS_ERR(cxlmd))
> @@ -200,6 +208,21 @@ struct cxl_memdev *devm_cxl_add_memdev(struct device *host,
> if (rc)
> return ERR_PTR(rc);
>
> + /*
> + * If ops is provided fail if the driver is not attached upon
> + * return. The ->endpoint ERR_PTR may have a more precise error
> + * code to convey. Note that failure here could be the result of
> + * a race to teardown the CXL port topology. I.e.
> + * cxl_mem_probe() could have succeeded and then cxl_mem unbound
> + * before the lock is acquired.
> + */
> + guard(device)(&cxlmd->dev);
> + if (ops && !cxlmd->dev.driver) {
> + if (IS_ERR(cxlmd->endpoint))
> + return ERR_CAST(cxlmd->endpoint);
> + return ERR_PTR(-ENXIO);
> + }
> +
> return no_free_ptr(cxlmd);
> }
> EXPORT_SYMBOL_NS_GPL(devm_cxl_add_memdev, "CXL");
> diff --git a/drivers/cxl/private.h b/drivers/cxl/private.h
> index f8d1ff64f534..7c04797a3a28 100644
> --- a/drivers/cxl/private.h
> +++ b/drivers/cxl/private.h
> @@ -8,7 +8,8 @@
>
> #ifndef __CXL_PRIVATE_H__
> #define __CXL_PRIVATE_H__
> -struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds);
> +struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds,
> + const struct cxl_memdev_ops *ops);
> int devm_cxl_memdev_add_or_reset(struct device *host, struct cxl_memdev *cxlmd);
> int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd,
> struct cxl_dport *parent_dport);
> diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
> index d533481672b7..33d06ec5a4b9 100644
> --- a/tools/testing/cxl/test/mem.c
> +++ b/tools/testing/cxl/test/mem.c
> @@ -1768,7 +1768,7 @@ static int cxl_mock_mem_probe(struct platform_device *pdev)
>
> cxl_mock_add_event_logs(&mdata->mes);
>
> - cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds);
> + cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds, NULL);
> if (IS_ERR(cxlmd))
> return PTR_ERR(cxlmd);
>
next prev parent reply other threads:[~2025-11-13 23:02 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-10 15:36 [PATCH v20 00/22] Type2 device basic support alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 01/22] cxl/mem: Arrange for always-synchronous memdev attach alejandro.lucero-palau
2025-11-12 14:53 ` Jonathan Cameron
2025-11-14 11:10 ` Alejandro Lucero Palau
2025-11-14 15:24 ` Dave Jiang
2025-11-10 15:36 ` [PATCH v20 02/22] cxl/port: Arrange for always synchronous endpoint attach alejandro.lucero-palau
2025-11-12 14:57 ` Jonathan Cameron
2025-11-13 23:01 ` Dave Jiang
2025-11-10 15:36 ` [PATCH v20 03/22] cxl/mem: Introduce a memdev creation ->probe() operation alejandro.lucero-palau
2025-11-12 15:00 ` Jonathan Cameron
2025-11-13 23:02 ` Dave Jiang [this message]
2025-11-10 15:36 ` [PATCH v20 04/22] cxl: Add type2 device basic support alejandro.lucero-palau
2025-11-12 15:33 ` Jonathan Cameron
2025-11-15 8:11 ` Alejandro Lucero Palau
2025-11-10 15:36 ` [PATCH v20 05/22] sfc: add cxl support alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 06/22] cxl: Move pci generic code alejandro.lucero-palau
2025-11-12 15:41 ` Jonathan Cameron
2025-11-15 8:12 ` Alejandro Lucero Palau
2025-11-17 15:00 ` Dave Jiang
2025-11-18 14:52 ` Alejandro Lucero Palau
2025-11-14 0:25 ` Alison Schofield
2025-11-14 16:15 ` Dave Jiang
2025-11-15 8:16 ` Alejandro Lucero Palau
2025-11-16 2:07 ` Alison Schofield
2025-11-18 14:55 ` Alejandro Lucero Palau
2025-11-10 15:36 ` [PATCH v20 07/22] cxl/sfc: Map cxl component regs alejandro.lucero-palau
2025-11-12 15:45 ` Jonathan Cameron
2025-11-12 15:52 ` Jonathan Cameron
2025-11-10 15:36 ` [PATCH v20 08/22] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2025-11-12 15:52 ` Jonathan Cameron
2025-11-10 15:36 ` [PATCH v20 09/22] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 10/22] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 11/22] cxl: Define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-11-12 16:10 ` Jonathan Cameron
2025-11-19 17:16 ` Alejandro Lucero Palau
2025-11-10 15:36 ` [PATCH v20 12/22] sfc: get root decoder alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 13/22] cxl: Define a driver interface for DPA allocation alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 14/22] sfc: get endpoint decoder alejandro.lucero-palau
2025-11-13 23:52 ` Dave Jiang
2025-11-10 15:36 ` [PATCH v20 15/22] cxl: Make region type based on endpoint type alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 16/22] cxl/region: Factor out interleave ways setup alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 17/22] cxl/region: Factor out interleave granularity setup alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 18/22] cxl: Allow region creation by type2 drivers alejandro.lucero-palau
2025-11-12 16:19 ` Jonathan Cameron
2025-11-19 18:31 ` Alejandro Lucero Palau
2025-11-14 0:00 ` Dave Jiang
2025-11-10 15:36 ` [PATCH v20 19/22] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 20/22] sfc: create cxl region alejandro.lucero-palau
2025-11-12 16:21 ` Jonathan Cameron
2025-11-14 0:02 ` Dave Jiang
2025-11-10 15:36 ` [PATCH v20 21/22] cxl: Add function for obtaining region range alejandro.lucero-palau
2025-11-10 15:36 ` [PATCH v20 22/22] sfc: support pio mapping based on cxl alejandro.lucero-palau
2025-11-12 16:24 ` Jonathan Cameron
2025-11-14 0:03 ` Dave Jiang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=00fd29f9-ff62-4581-8e8d-5980fb22bf7c@intel.com \
--to=dave.jiang@intel.com \
--cc=alejandro.lucero-palau@amd.com \
--cc=dan.j.williams@intel.com \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=edward.cree@amd.com \
--cc=kuba@kernel.org \
--cc=linux-cxl@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).