Re: [PATCH net v1] net: phy: motorcomm: yt8821: disable MDIO broadcast address 0

["Jakub Vaněk" <linuxtardis@gmail.com>]

Hello Daniel, Qingfang, SkyLake,

do you happen to know if the MediaTek Gigabit PHY in the MT7981B
can be remapped to a MDIO address other than address 0?

I wasn't able to find public documentation describing the registers
of internal PHY or whether its MDIO address is configurable.

Being able to move the internal PHY off address 0 in U-Boot could be
a better way of resolving a MDIO address conflict between the internal
PHY and the broadcast address used by an external Motorcomm YT8821 PHY.

Any pointers would be appreciated.

Best regards,
Jakub

On 2/22/26 00:46, Jakub Vaněk wrote:
> The YT8821 PHY responds on two MDIO addresses by default: the address
> selected by its strapping pins and the broadcast address 0.
> 
> On platforms where another PHY is hardwired to respond only on address 0
> (e.g. the internal Gigabit PHY in the MediaTek MT7981B SoC), this can lead
> to MDIO bus conflicts. The YT8821 may incorrectly respond to transactions
> intended for the other PHY, leaving it in an inconsistent state. The
> following issues were observed on a Cudy M3000 router:
> 
> - Achieving just 100 Mbps speeds on gigabit links. Dmesg would show
>   messages like
> 
>     [ 133.997177] YT8821 2.5Gbps PHY mdio-bus:01: Downshift occurred from negotiated speed 1Gbps to actual speed 100Mbps, check cabling!
>     [ 134.009400] mtk_soc_eth 15100000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
> 
> - Having the PHY report that the link is up, yet no data would flow.
> - The YT8821 would be affected by an "ip link set dev eth1 down"
>   command aimed at the other PHY.