From: Pu Lehui <pulehui@huaweicloud.com>
To: "Björn Töpel" <bjorn@kernel.org>, "Pu Lehui" <pulehui@huawei.com>,
bpf@vger.kernel.org, linux-riscv@lists.infradead.org,
netdev@vger.kernel.org
Cc: Alexei Starovoitov <ast@kernel.org>,
Daniel Borkmann <daniel@iogearbox.net>,
Andrii Nakryiko <andrii@kernel.org>,
Martin KaFai Lau <martin.lau@linux.dev>,
Song Liu <song@kernel.org>, Yonghong Song <yhs@fb.com>,
John Fastabend <john.fastabend@gmail.com>,
KP Singh <kpsingh@kernel.org>,
Stanislav Fomichev <sdf@google.com>, Hao Luo <haoluo@google.com>,
Jiri Olsa <jolsa@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>,
Conor Dooley <conor@kernel.org>,
Luke Nelson <luke.r.nels@gmail.com>,
Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH RESEND bpf-next v3 4/6] riscv, bpf: Add necessary Zbb instructions
Date: Wed, 31 Jan 2024 17:22:42 +0800 [thread overview]
Message-ID: <050c301e-dfd0-4488-bc3c-0287da838981@huaweicloud.com> (raw)
In-Reply-To: <87o7d2ohdi.fsf@all.your.base.are.belong.to.us>
On 2024/1/31 1:34, Björn Töpel wrote:
> Pu Lehui <pulehui@huawei.com> writes:
>
>> On 2024/1/30 14:18, Björn Töpel wrote:
>>> Daniel Borkmann <daniel@iogearbox.net> writes:
>>>
>>>> On 1/29/24 10:13 AM, Pu Lehui wrote:
>>>>> On 2024/1/28 1:16, Björn Töpel wrote:
>>>>>> Pu Lehui <pulehui@huaweicloud.com> writes:
>>>>>>
>>>>>>> From: Pu Lehui <pulehui@huawei.com>
>>>>>>>
>>>>>>> Add necessary Zbb instructions introduced by [0] to reduce code size and
>>>>>>> improve performance of RV64 JIT. Meanwhile, a runtime deteted helper is
>>>>>>> added to check whether the CPU supports Zbb instructions.
>>>>>>>
>>>>>>> Link: https://github.com/riscv/riscv-bitmanip/releases/download/1.0.0/bitmanip-1.0.0-38-g865e7a7.pdf [0]
>>>>>>> Signed-off-by: Pu Lehui <pulehui@huawei.com>
>>>>>>> ---
>>>>>>> arch/riscv/net/bpf_jit.h | 32 ++++++++++++++++++++++++++++++++
>>>>>>> 1 file changed, 32 insertions(+)
>>>>>>>
>>>>>>> diff --git a/arch/riscv/net/bpf_jit.h b/arch/riscv/net/bpf_jit.h
>>>>>>> index e30501b46f8f..51f6d214086f 100644
>>>>>>> --- a/arch/riscv/net/bpf_jit.h
>>>>>>> +++ b/arch/riscv/net/bpf_jit.h
>>>>>>> @@ -18,6 +18,11 @@ static inline bool rvc_enabled(void)
>>>>>>> return IS_ENABLED(CONFIG_RISCV_ISA_C);
>>>>>>> }
>>>>>>> +static inline bool rvzbb_enabled(void)
>>>>>>> +{
>>>>>>> + return IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && riscv_has_extension_likely(RISCV_ISA_EXT_ZBB);
>>>>>>
>>>>>> Hmm, I'm thinking about the IS_ENABLED(CONFIG_RISCV_ISA_ZBB) semantics
>>>>>> for a kernel JIT compiler.
>>>>>>
>>>>>> IS_ENABLED(CONFIG_RISCV_ISA_ZBB) affects the kernel compiler flags.
>>>>>> Should it be enough to just have the run-time check? Should a kernel
>>>>>> built w/o Zbb be able to emit Zbb from the JIT?
>>>>>
>>>>> Not enough, because riscv_has_extension_likely(RISCV_ISA_EXT_ZBB) is
>>>>> a platform capability check, and the other one is a kernel image
>>>>> capability check. We can pass the check
>>>>> riscv_has_extension_likely(RISCV_ISA_EXT_ZBB) when
>>>>> CONFIG_RISCV_ISA_ZBB=n. And my local test prove it.
>>>
>>> What I'm trying to say (and drew as well in the other reply) is that
>>> "riscv_has_extension_likely(RISCV_ISA_EXT_ZBB) when
>>> CONFIG_RISCV_ISA_ZBB=n" should also make the JIT emit Zbb insns. The
>>> platform check should be sufficient.
>>
>> Ooh, this is really beyond my expectation. The test_progs can pass when
>> with only platform check and it can recognize the zbb instructions. Now
>> I know it. Sorry for misleading.🙁
>>
>> Curious if CONFIG_RISCV_ISA_ZBB is still necessary?
>
> You don't need IS_ENABLED(CONFIG_RISCV_ISA_ZBB) for the JIT, but the
> kernel needs it.
>
> Feel free to follow up with a patch to remove it.
>
Maybe we can implement more extensions about bitmanip.
>
> Cheers,
> Björn
next prev parent reply other threads:[~2024-01-31 9:22 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-15 13:12 [PATCH RESEND bpf-next v3 0/6] Zbb support and code simplification for RV64 JIT Pu Lehui
2024-01-15 13:12 ` [PATCH RESEND bpf-next v3 1/6] riscv, bpf: Unify 32-bit sign-extension to emit_sextw Pu Lehui
2024-01-15 13:12 ` [PATCH RESEND bpf-next v3 2/6] riscv, bpf: Unify 32-bit zero-extension to emit_zextw Pu Lehui
2024-01-15 13:12 ` [PATCH RESEND bpf-next v3 3/6] riscv, bpf: Simplify sext and zext logics in branch instructions Pu Lehui
2024-01-15 13:12 ` [PATCH RESEND bpf-next v3 4/6] riscv, bpf: Add necessary Zbb instructions Pu Lehui
2024-01-27 17:16 ` Björn Töpel
2024-01-29 9:13 ` Pu Lehui
2024-01-29 15:32 ` Daniel Borkmann
2024-01-30 1:00 ` Pu Lehui
2024-01-30 6:18 ` Björn Töpel
2024-01-30 8:20 ` Pu Lehui
2024-01-30 17:34 ` Björn Töpel
2024-01-31 9:22 ` Pu Lehui [this message]
2024-01-29 11:43 ` Andrew Jones
2024-01-15 13:12 ` [PATCH RESEND bpf-next v3 5/6] riscv, bpf: Optimize sign-extention mov insns with Zbb support Pu Lehui
2024-01-15 13:12 ` [PATCH RESEND bpf-next v3 6/6] riscv, bpf: Optimize bswap " Pu Lehui
2024-01-22 14:33 ` [PATCH RESEND bpf-next v3 0/6] Zbb support and code simplification for RV64 JIT Björn Töpel
2024-01-22 14:37 ` Pu Lehui
2024-01-22 14:44 ` Björn Töpel
2024-01-22 15:07 ` Björn Töpel
2024-01-22 15:17 ` Pu Lehui
2024-01-22 16:30 ` Björn Töpel
2024-01-23 1:57 ` Pu Lehui
2024-01-22 15:15 ` Pu Lehui
2024-01-27 17:12 ` Björn Töpel
2024-01-29 15:30 ` patchwork-bot+netdevbpf
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