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Hermes SMTP Server) with ESMTPA ID 46a763abb20b372b1e2d53c07276f718; Thu, 08 Oct 2026 15:07:44 +0000 (UTC) Message-ID: <058a5e14-76ea-4c88-bc52-f37e3e502a92@yahoo.com> Date: Thu, 8 Oct 2026 17:07:41 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next 4/8] net: dsa: realtek: rtl8365mb: set RGMII mode for family D From: Mieczyslaw Nalewaj To: Andrew Lunn Cc: linusw@kernel.org, alsi@bang-olufsen.dk, olteanv@gmail.com, kuba@kernel.org, davem@davemloft.net, edumazet@google.com, pabeni@redhat.com, linux@armlinux.org.uk, luizluca@gmail.com, maxime.chevallier@bootlin.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org References: <84fc7483-b22d-45ea-a3b8-3285dc357265@yahoo.com> Content-Language: pl In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Mailer: WebService/1.1.26668 mail.backend.jedi.jws.acl:role.jedi.acl.token.atz.jws.hermes.yahoo On 10/8/2026 4:09 PM, Mieczyslaw Nalewaj wrote: > On 10/8/2026 3:22 AM, Andrew Lunn wrote: >>> +#define RTL8365MB_D_REG_EXT_TXC_DLY 0x13f9 >>> +#define RTL8365MB_D_EXT1_RGMII_TX_DLY_MASK GENMASK(5, 3) >> >> The current code looks at tx-internal-delay-ps and >> rx-internal-delay-ps and programs some other registers. It is not >> clear to me that the code you are adding here is correct when combined >> with the current code. Please could you look at the delay >> configuration. >> >> Andrew > > 0x13f9 is EXT_TXC_DLY in the vendor code. It holds 3-bit TX delay > fields per external interface, separately for RGMII ([2:0] EXT0, > [5:3] EXT1, [8:6] EXT2) and for GMII ([11:9] EXT0, [14:12] EXT1). > The vendor RGMII setup path for EXT1 clears the RGMII field [5:3], so > this is an extra TX clock delay next to the TXDELAY bit in RGMXF, and > the GMII fields are not touched. Clearing it makes tx-internal-delay-ps > the only source of TX delay instead of whatever the bootloader left > behind. I'll say so in the commit message and a comment in v2. > > Regards, > > Mieczyslaw Hi Andrew, Correction to my previous mail: the bootloader is not involved. The init jam table writes 0x0090 to 0x13f9, leaving the EXT1 RGMII TX delay field [5:3] at 2, so without the clear it would stay on top of tx-internal-delay-ps. I'll say so in the commit message in v2. Thanks,