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From: PJ Waskiewicz <ppwaskie@kernel.org>
To: Alejandro Lucero Palau <alucerop@amd.com>,
	alejandro.lucero-palau@amd.com, 	linux-cxl@vger.kernel.org,
	netdev@vger.kernel.org, dan.j.williams@intel.com,
		edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
	pabeni@redhat.com,  edumazet@google.com, dave.jiang@intel.com
Cc: Martin Habets <habetsm.xilinx@gmail.com>,
	Edward Cree <ecree.xilinx@gmail.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	 Ben Cheatham <benjamin.cheatham@amd.com>
Subject: Re: [PATCH v21 15/23] sfc: get endpoint decoder
Date: Tue, 02 Dec 2025 00:49:36 -0800	[thread overview]
Message-ID: <07a0cd77a61358cfb6e436da60fb5f644201b52c.camel@kernel.org> (raw)
In-Reply-To: <ab182638-3693-422b-a7b6-b3630a35a0be@amd.com>

Hi Alejandro,

On Thu, 2025-11-27 at 09:08 +0000, Alejandro Lucero Palau wrote:
> > 
> > TL;DR: if your device you're testing with presents the CXL.mem
> > region
> > as EFI_RESERVED_TYPE, I don't see how these patches are working.
> > Unless you're doing something extra outside of the patches, which
> > isn't
> > obvious to me.
> 
> 
> Yes, sorry, that is the case. I'm applying some dirty changes to
> these 
> patches for testing with my current testing devices, including the
> BIOS 
> and the Host.
> 

Well, this is basically the issue.

You are proposing these patches to support Type 2 devices, and use the
X4 with SFC as the vehicle.  But out of the box, following the same
flow, my driver for my (proprietary) device can't match the behavior. 
If you're having to make modifications to these patches to work with
your device, even if it's to work around a weird platform or BIOS, then
these patches can't be considered as-is.

I have two main platforms in use for development.  One is an Intel
Granite Rapids, one is an AMD Turin.  I've got production SKU's and
CRB's, so I have a cross-section of BIOS's.  All of them behave the
exact same way with these patches.  I do have a BIOS that is doing the
right thing from what I can tell (tracing with a bus analyzer, and also
ILA taps).

CXL Type 2 device support is desparately needed.  I'm happy you've been
championing this to get it merged.  I'm also very committed to helping
test, modify, etc.  So please don't be discouraged.

I'm also one who's dealt with internal pressures from a company to get
something working upstream.  But honestly, upstream work doesn't align
with corporate or company calendars.  Been there, done that, hasn't
gotten easier.  The kernel can't take a patchset that doesn't work at
face value.  It's unfortunately as simple as that.  So let's figure out
how to get it working out of the box with the patches.

> 
> > > 
> > > FWIW, last year in Vienna I raised the concern of the kernel
> > > doing
> > > exactly what you are witnessing, and I proposed having a way for
> > > taking
> > > the device/memory from DAX but I was told unanimously that was
> > > not
> > > necessary and if the BIOS did the wrong thing, not fixing that in
> > > the
> > > kernel. In hindsight I would say this conflict was not well
> > > understood
> > > then (me included) with all the details, so maybe it is time to
> > > have
> > > this capacity, maybe from user space or maybe specific kernel
> > > param
> > > triggering the device passing from DAX.
> > I do recall this.  Unfortunately I brought up similar concerns way
> > back
> > in Dublin in 2021 regarding all of this flow well before 2.0-
> > capable
> > hosts arrived.  I think I started asking the questions way too
> > early,
> > since this was of little to no concern at the time (nor was Type2
> > device support).
> 
> 
> Maybe we can make the case now. I'll seize LPC to discuss this
> further. 
> Will you be there?

Yep.  I'll be there, as will Dan.  We definitely need to find some time
and chat.


Cheers,
-PJ

  reply	other threads:[~2025-12-02  8:49 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-19 19:22 [PATCH v21 00/23] Type2 device basic support alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 01/23] cxl/mem: refactor memdev allocation alejandro.lucero-palau
2025-11-20 18:08   ` Jonathan Cameron
2025-11-20 18:27     ` Alejandro Lucero Palau
2025-11-21 12:06       ` Jonathan Cameron
2025-11-21 13:46         ` Alejandro Lucero Palau
2025-11-20 20:27   ` Koralahalli Channabasappa, Smita
2025-11-21 13:41     ` Alejandro Lucero Palau
2025-12-02  2:52   ` dan.j.williams
2025-12-02  4:58     ` dan.j.williams
2025-12-02  8:47     ` Alejandro Lucero Palau
2025-11-19 19:22 ` [PATCH v21 02/23] cxl/mem: Arrange for always-synchronous memdev attach alejandro.lucero-palau
2025-12-02  5:03   ` dan.j.williams
2025-11-19 19:22 ` [PATCH v21 03/23] cxl/port: Arrange for always synchronous endpoint attach alejandro.lucero-palau
2025-12-02  5:08   ` dan.j.williams
2025-11-19 19:22 ` [PATCH v21 04/23] cxl/mem: Introduce a memdev creation ->probe() operation alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 05/23] cxl: Add type2 device basic support alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 06/23] sfc: add cxl support alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 07/23] cxl: Move pci generic code alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 08/23] cxl/sfc: Map cxl component regs alejandro.lucero-palau
2025-11-21  6:54   ` PJ Waskiewicz
2025-11-21 11:01     ` Alejandro Lucero Palau
2025-11-22  1:11       ` PJ Waskiewicz
2025-11-19 19:22 ` [PATCH v21 09/23] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 10/23] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 11/23] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 12/23] cxl: Define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 13/23] sfc: get root decoder alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 14/23] cxl: Define a driver interface for DPA allocation alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 15/23] sfc: get endpoint decoder alejandro.lucero-palau
2025-11-26  1:27   ` PJ Waskiewicz
2025-11-26  9:09     ` Alejandro Lucero Palau
2025-11-26 18:35       ` PJ Waskiewicz
2025-11-27  9:08         ` Alejandro Lucero Palau
2025-12-02  8:49           ` PJ Waskiewicz [this message]
2025-12-02  9:09             ` Alejandro Lucero Palau
2025-12-02 16:35         ` Dave Jiang
2025-11-19 19:22 ` [PATCH v21 16/23] cxl: Make region type based on endpoint type alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 17/23] cxl/region: Factor out interleave ways setup alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 18/23] cxl/region: Factor out interleave granularity setup alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 19/23] cxl: Allow region creation by type2 drivers alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 20/23] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 21/23] sfc: create cxl region alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 22/23] cxl: Add function for obtaining region range alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 23/23] sfc: support pio mapping based on cxl alejandro.lucero-palau
2025-11-21  6:41 ` [PATCH v21 00/23] Type2 device basic support PJ Waskiewicz
2025-11-21 10:40   ` Alejandro Lucero Palau
2025-11-22  1:08     ` PJ Waskiewicz
2025-11-28 19:44 ` PJ Waskiewicz
2025-11-28 20:29   ` Alejandro Lucero Palau
2025-11-29 16:26     ` Alejandro Lucero Palau

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