From: Yanteng Si <si.yanteng@linux.dev>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Furong Xu <0x1207@gmail.com>,
Joao Pinto <Joao.Pinto@synopsys.com>,
Vince Bridgers <vbridger@opensource.altera.com>,
netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net v2 2/3] net: stmmac: Limit FIFO size by hardware capability
Date: Wed, 22 Jan 2025 01:14:25 +0800 [thread overview]
Message-ID: <07f2f6d0-e025-4b21-ac41-caaf71bb6fff@linux.dev> (raw)
In-Reply-To: <20250121044138.2883912-3-hayashi.kunihiko@socionext.com>
在 1/21/25 12:41, Kunihiko Hayashi 写道:
> Tx/Rx FIFO size is specified by the parameter "{tx,rx}-fifo-depth" from
> stmmac_platform layer.
>
> However, these values are constrained by upper limits determined by the
> capabilities of each hardware feature. There is a risk that the upper
> bits will be truncated due to the calculation, so it's appropriate to
> limit them to the upper limit values and display a warning message.
>
> Fixes: e7877f52fd4a ("stmmac: Read tx-fifo-depth and rx-fifo-depth from the devicetree")
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index 251a8c15637f..da3316e3e93b 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -7245,6 +7245,19 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
> priv->plat->tx_queues_to_use = priv->dma_cap.number_tx_queues;
> }
>
> + if (priv->plat->rx_fifo_size > priv->dma_cap.rx_fifo_size) {
> + dev_warn(priv->device,
> + "Rx FIFO size exceeds dma capability (%d)\n",
> + priv->plat->rx_fifo_size);
> + priv->plat->rx_fifo_size = priv->dma_cap.rx_fifo_size;
I executed grep and found that only dwmac4 and dwxgmac2 have initialized
dma_cap.rx_fifo_size. Can this code still work properly on hardware
other than these two?
Thanks,
Yanteng
next prev parent reply other threads:[~2025-01-21 17:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-21 4:41 [PATCH net v2 0/3] Limit devicetree parameters to hardware capability Kunihiko Hayashi
2025-01-21 4:41 ` [PATCH net v2 1/3] net: stmmac: Limit the number of MTL queues " Kunihiko Hayashi
2025-01-21 6:25 ` Furong Xu
2025-01-21 4:41 ` [PATCH net v2 2/3] net: stmmac: Limit FIFO size by " Kunihiko Hayashi
2025-01-21 17:14 ` Yanteng Si [this message]
2025-01-21 17:29 ` Russell King (Oracle)
2025-01-23 5:25 ` Kunihiko Hayashi
2025-01-22 4:07 ` Huacai Chen
2025-01-21 4:41 ` [PATCH net v2 3/3] net: stmmac: Specify hardware capability value when FIFO size isn't specified Kunihiko Hayashi
2025-01-21 10:25 ` [PATCH net v2 0/3] Limit devicetree parameters to hardware capability Russell King (Oracle)
2025-01-23 5:25 ` Kunihiko Hayashi
2025-01-23 16:31 ` Russell King (Oracle)
2025-01-24 4:19 ` Kunihiko Hayashi
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