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From: Liang Xu <lxu@maxlinear.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "hkallweit1@gmail.com" <hkallweit1@gmail.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
	Hauke Mehrtens <hmehrtens@maxlinear.com>,
	Thomas Mohren <tmohren@maxlinear.com>
Subject: Re: [PATCH] phy: maxlinear: add Maxlinear GPY115/21x/24x driver
Date: Tue, 1 Jun 2021 17:14:01 +0000	[thread overview]
Message-ID: <089adb48-c3f7-4c4e-808f-b303a0cd16d6@maxlinear.com> (raw)
In-Reply-To: <YLZmZ0pa4vULonsZ@lunn.ch>

On 2/6/2021 12:55 am, Andrew Lunn wrote:
> This email was sent from outside of MaxLinear.
>
>
>>>> +     linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
>>>> +                      phydev->supported,
>>>> +                      ret & MDIO_PMA_NG_EXTABLE_5GBT);
>>>> +
>>> Does genphy_c45_pma_read_abilities() do the wrong thing here? What
>>> does it get wrong?
>> The problem comes from condition "phydev->c45_ids.mmds_present &
>> MDIO_DEVS_AN".
>>
>> Our product supports both C22 and C45.
>>
>> In the real system, we found C22 was used by customers (with indirect
>> access to C45 registers when necessary).
>>
>> Then during probe, in API "get_phy_device", it skips reading C45 IDs.
>>
>> So that genphy_c45_pma_read_abilities skip the supported flag
>> ETHTOOL_LINK_MODE_Autoneg_BIT.
> This sounds like a generic problem, which will affect any PHY which
> has both C22 and C45. I wounder if it makes sense to add a helper
> function which a PHY driver can call to get the
> phydev->c45_ids.mmds_present populated?

I thought to use get_phy_c45_ids in gpy_config_init to populate the 
c45_ids, but this is a static function inside phy_device.c.

Or maybe in genphy_c45_pma_read_abilities, it reads MII_BMSR register if 
is_c45 not set.

>>>> +static int gpy_read_status(struct phy_device *phydev)
>>>> +{
>>>> +     int ret;
>>>> +
>>>> +     ret = genphy_update_link(phydev);
>>>> +     if (ret)
>>>> +             return ret;
>>>> +
>>>> +     phydev->speed = SPEED_UNKNOWN;
>>>> +     phydev->duplex = DUPLEX_UNKNOWN;
>>>> +     phydev->pause = 0;
>>>> +     phydev->asym_pause = 0;
>>>> +
>>>> +     if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
>>>> +             ret = genphy_c45_read_lpa(phydev);
>>>> +             if (ret < 0)
>>>> +                     return ret;
>>>> +
>>>> +             /* Read the link partner's 1G advertisement */
>>>> +             ret = phy_read(phydev, MII_STAT1000);
>>>> +             if (ret < 0)
>>>> +                     return ret;
>>>> +             mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, ret);
>>> can genphy_read_lpa() be used here?
>> 2.5G is not covered in genphy_read_lpa.
>>
>> If I use genphy_c45_read_lpa first then genphy_read_lpa after, it seems
>> a bit redundant.
> I'm just trying to avoid repeating code which is in helpers. I think
> this is the first PHY driver which uses a mixture of C22 and C45 like
> this. So it could be the helpers need small modifications to make them
> work. We should make those modifications, since your PHY is not likely
> to be the only mixed C22 and C45 device.

I agree, this is issue for mixed C22/45 device.

I saw something similar in BRCM driver (bcm84881_read_status) and 
Marvell driver (mv3310_read_status_copper).

They are C45 device and use vendor specific register in MMD to access 
C22 equivalent registers.

>
>     Andrew
>


  reply	other threads:[~2021-06-01 17:14 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-01  7:44 [PATCH] phy: maxlinear: add Maxlinear GPY115/21x/24x driver Xu Liang
2021-06-01 11:41 ` Wong Vee Khee
2021-06-01 14:46   ` Liang Xu
2021-06-01 12:25 ` Russell King (Oracle)
2021-06-01 12:41 ` Andrew Lunn
2021-06-01 15:53   ` Liang Xu
2021-06-01 16:55     ` Andrew Lunn
2021-06-01 17:14       ` Liang Xu [this message]
2021-06-01 19:13         ` Andrew Lunn

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