Re: dp83867: Why does ti,fifo-depth set only TX, and why is it mandatory?

[Dan Murphy <dmurphy@ti.com>]

Adrian

On 11/14/19 2:01 PM, Dan Murphy wrote:
> Adrian
>
> On 11/14/19 1:47 PM, Adrian Bunk wrote:
>> On Thu, Nov 14, 2019 at 11:53:36AM -0600, Dan Murphy wrote:
>>> Adrian
>> Hi Dan,
>>
>>> ...
>>>> 2. Why is it a mandatory property?
>>>> Perhaps I am missing something obvious, but why can't the driver 
>>>> either
>>>> leave the value untouched or set the maximum when nothing is 
>>>> configured?
>>> When the driver was originally written it was written only for RGMII
>>> interfaces as that is the MII that the data sheet references and 
>>> does not
>>> reference SGMII.  We did not have SGMII samples available at that time.
>>> According to the HW guys setting the FIFO depth is required for RGMII
>>> interfaces.
>> My reading of the datasheets is that it isn't needed at all for RGMII,
>> only for SGMII and gigabit GMII.
>>
>> Which makes it weird that it is only written in the RGMII case where it
>> is documented to be disabled.
>>
>> And there is a documented default value so writing shouldn't be 
>> mandatory
>> in any case.
>>
>> Perhaps I am looking at the wrong datasheets or there's a hardware 
>> errata?
>>
OK the HW team said that FIFO depth is no longer a mandatory field to be 
written for either RGMII or SGMII.

So my suggestion here is that we deprecate, but support in the driver, 
the ti-fifo-depth, and add the already documented

rx-fifo-depth and tx-fifo-depth as optional DT entries.

So I can change the driver and DT docs and test the RGMII device as 
above as long as we are in agreement

Dan