From: Heiner Kallweit <hkallweit1@gmail.com>
To: javen <javen_xu@realsil.com.cn>,
nic_swsd@realtek.com, andrew+netdev@lunn.ch, davem@davemloft.net,
edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
horms@kernel.org
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v1] r8169: add support for RTL8125cp
Date: Sat, 31 Jan 2026 22:14:27 +0100 [thread overview]
Message-ID: <0960233e-d0aa-4819-8a5b-ed43b2b08aed@gmail.com> (raw)
In-Reply-To: <20260130093545.1753-1-javen_xu@realsil.com.cn>
On 1/30/2026 10:35 AM, javen wrote:
> From: Javen Xu <javen_xu@realsil.com.cn>
>
> This patch adds support for chip RTL8125cp. Its XID is 0x708. We apply
> different and firmware for RTL8125cp.
>
> Signed-off-by: Javen Xu <javen_xu@realsil.com.cn>
> ---
> drivers/net/ethernet/realtek/r8169.h | 1 +
> drivers/net/ethernet/realtek/r8169_main.c | 6 +++++
> .../net/ethernet/realtek/r8169_phy_config.c | 22 +++++++++++++++++++
> 3 files changed, 29 insertions(+)
>
> diff --git a/drivers/net/ethernet/realtek/r8169.h b/drivers/net/ethernet/realtek/r8169.h
> index aed4cf852091..0b9c1d4eb48b 100644
> --- a/drivers/net/ethernet/realtek/r8169.h
> +++ b/drivers/net/ethernet/realtek/r8169.h
> @@ -68,6 +68,7 @@ enum mac_version {
> RTL_GIGA_MAC_VER_61,
> RTL_GIGA_MAC_VER_63,
> RTL_GIGA_MAC_VER_64,
> + RTL_GIGA_MAC_VER_65,
> RTL_GIGA_MAC_VER_66,
> RTL_GIGA_MAC_VER_70,
> RTL_GIGA_MAC_VER_80,
> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
> index 2f7d9809c373..d040f2074db6 100644
> --- a/drivers/net/ethernet/realtek/r8169_main.c
> +++ b/drivers/net/ethernet/realtek/r8169_main.c
> @@ -60,6 +60,7 @@
> #define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
> #define FIRMWARE_8125K_1 "rtl_nic/rtl8125k-1.fw"
> #define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
> +#define FIRMWARE_8125CP_1 "rtl_nic/rtl8125cp-1.fw"
> #define FIRMWARE_9151A_1 "rtl_nic/rtl9151a-1.fw"
> #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
> #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
> @@ -112,6 +113,9 @@ static const struct rtl_chip_info {
> /* 8125BP family. */
> { 0x7cf, 0x681, RTL_GIGA_MAC_VER_66, "RTL8125BP", FIRMWARE_8125BP_2 },
>
> + /* 8125CP family*/
> + { 0x7cf, 0x708, RTL_GIGA_MAC_VER_65, "RTL8125CP", FIRMWARE_8125CP_1 },
> +
> /* 8125D family. */
> { 0x7cf, 0x68b, RTL_GIGA_MAC_VER_64, "RTL9151A", FIRMWARE_9151A_1 },
> { 0x7cf, 0x68a, RTL_GIGA_MAC_VER_64, "RTL8125K", FIRMWARE_8125K_1 },
> @@ -802,6 +806,7 @@ MODULE_FIRMWARE(FIRMWARE_8125D_1);
> MODULE_FIRMWARE(FIRMWARE_8125D_2);
> MODULE_FIRMWARE(FIRMWARE_8125K_1);
> MODULE_FIRMWARE(FIRMWARE_8125BP_2);
> +MODULE_FIRMWARE(FIRMWARE_8125CP_1);
> MODULE_FIRMWARE(FIRMWARE_9151A_1);
> MODULE_FIRMWARE(FIRMWARE_8126A_2);
> MODULE_FIRMWARE(FIRMWARE_8126A_3);
> @@ -4021,6 +4026,7 @@ static void rtl_hw_config(struct rtl8169_private *tp)
> [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
> [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
> [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
> + [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
> [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
> [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
> [RTL_GIGA_MAC_VER_80] = rtl_hw_start_8127a,
> diff --git a/drivers/net/ethernet/realtek/r8169_phy_config.c b/drivers/net/ethernet/realtek/r8169_phy_config.c
> index 032d9d2cfa2a..1896d0ce42ac 100644
> --- a/drivers/net/ethernet/realtek/r8169_phy_config.c
> +++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
> @@ -1102,6 +1102,27 @@ static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
> rtl8125_config_eee_phy(phydev);
> }
>
> +static void rtl8125cp_hw_phy_config(struct rtl8169_private *tp,
> + struct phy_device *phydev)
> +{
> + r8169_apply_firmware(tp);
> + rtl8168g_enable_gphy_10m(phydev);
> +
> + phy_modify_paged(phydev, 0xad0, 0x17, 0x007f, 0x000b);
> + phy_modify_paged(phydev, 0xad7, 0x14, 0x0000, BIT(4));
> + rtl8125_phy_param(phydev, 0x807f, 0xff00, 0x5300);
> + r8168g_phy_param(phydev, 0x81b8, 0xffff, 0x00b4);
> + r8168g_phy_param(phydev, 0x81ba, 0xffff, 0x00e4);
> + r8168g_phy_param(phydev, 0x81c5, 0xffff, 0x0104);
> + r8168g_phy_param(phydev, 0x81d0, 0xffff, 0x054d);
> + phy_modify_paged(phydev, 0xa43, 0x00, 0x0000, 0x1001);
This looks weird. In case of paged access the register usually
is in the range 0x10 .. 0x17.
> + phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, BIT(7));
> +
> + rtl8125_legacy_force_mode(phydev);
> + rtl8168g_disable_aldps(phydev);
> + rtl8125_config_eee_phy(phydev);
> +}
> +
> static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,
> struct phy_device *phydev)
> {
> @@ -1344,6 +1365,7 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
> [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
> [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
> [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
> + [RTL_GIGA_MAC_VER_65] = rtl8125cp_hw_phy_config,
> [RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
> [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
> [RTL_GIGA_MAC_VER_80] = rtl8127a_1_hw_phy_config,
prev parent reply other threads:[~2026-01-31 21:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-30 9:35 [PATCH net-next v1] r8169: add support for RTL8125cp javen
2026-01-31 21:14 ` Heiner Kallweit [this message]
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