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Thu, 15 Oct 2026 00:14:29 -0700 (PDT) X-Received: by 2002:a05:7301:71a4:b0:35a:4ad6:d215 with SMTP id 5a478bee46e88-35a4ae61ed4mr16226373eec.22.1792048468803; Thu, 15 Oct 2026 00:14:28 -0700 (PDT) Received: from [10.217.216.28] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-35de709d928sm14059954eec.25.2026.10.15.00.14.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Oct 2026 00:14:25 -0700 (PDT) Message-ID: <0cb8005e-964c-43e2-8e9d-4e955cf2ff90@oss.qualcomm.com> Date: Thu, 15 Oct 2026 12:44:17 +0530 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/5] pinctrl: qcom: Add gp_mn mux function for QCS8300, SA8775P and SC7280 To: Linus Walleij Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Konrad Dybcio , Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, netdev@vger.kernel.org References: <20260602-pdm_clk_gp_mnd_v1-v1-0-1522662b6c53@oss.qualcomm.com> <20260602-pdm_clk_gp_mnd_v1-v1-3-1522662b6c53@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDAyOCBTYWx0ZWRfX8jCh1Vt8sH+S KJCJPW69RxlNi9Pvzp5PqYYHHOdXjopQjpJV6Zrq/7WEgzYkzoVVyvzYGzQ3gV/eQ0qAlpDZmCj /4P4lQi8bY1aLekjJ4WYFMv7EoxQTak= X-Proofpoint-ORIG-GUID: aRDJosa3uTN6X1DMkMKSMAKcGDEBrank X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDAyOCBTYWx0ZWRfX+QOjclhC3U8b jh0trALLTgCr2cPA5qP1QjSdeDbcpxB8kWC6XhIJHnjlkVdjDg8B2uDR74ZUe1IzfireU1HpZDi 5V6Ada8QMN2qtreAx64te+0+NrSkwRZe13wz+TW1eE88RoXV3XryKEOfXdNMw3bKli+ZvEVpsGp imCxylC9vcMoNGt743m1aGgFa9VF+z9tX/MESoq4KjDDf8IXH9VK3w3U1THFdPXD0JXuCW3YYb3 nhKV4rH2tjeYMVihu3SO1WWPiyR9dDykOmEFML1jM5k7OTtNmV+MjfEkywDV9Dj5+ZZfxGRLPJT wEPxmJDXT4s/pFpo3uzpYvfFhnF86CIOD/qev1+BQ5SjfjaG1NMDmPINikwFejuqwwIyGwsdrOm /dY8WgLhptaO21CqoB4ZqXbbVj9d0NHD/xSMsi/JzLgGKkBc+q9PqxuKB2AuMEKJ6TPTbkl/DuB 0xajHA7ZbTRzSUx/Cmg== X-Authority-Analysis: v=2.4 cv=E8BYNqdl c=1 sm=1 tr=0 ts=6ad07d56 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=xfIMX-YVTLGOWNOYmacA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-GUID: aRDJosa3uTN6X1DMkMKSMAKcGDEBrank X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-13_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 impostorscore=0 suspectscore=0 malwarescore=0 spamscore=0 bulkscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150028 On 6/9/2026 4:13 AM, Linus Walleij wrote: > On Tue, Jun 2, 2026 at 5:22 PM Taniya Das wrote: > >> Add the gp_mn pin mux function to the TLMM pin controllers for the >> QCS8300, SA8775P and SC7280 SoCs. This function exposes the GP M/N >> divider clock output on a dedicated GPIO pin, allowing the clock signal >> to be routed externally. >> >> - QCS8300: gpio32 >> - SA8775P: gpio35 >> - SC7280: gpio60 >> >> Signed-off-by: Taniya Das > > This looks all right and no-one is saying anything about it, should > I just apply this one patch to the pin control tree? It doesn't seem > to have any dependencies. > Linus Walleij, sorry for the late response. I will split the patches as per comments from Konrad. -- Thanks, Taniya Das