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From: "Christian König" <christian.koenig@amd.com>
To: Vivian Wang <wangruikang@iscas.ac.cn>,
	Madhavan Srinivasan <maddy@linux.ibm.com>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Nicholas Piggin <npiggin@gmail.com>,
	"Christophe Leroy (CS GROUP)" <chleroy@kernel.org>,
	Alex Deucher <alexander.deucher@amd.com>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Brett Creeley <brett.creeley@amd.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>
Cc: Han Gao <gaohan@iscas.ac.cn>,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	netdev@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-sound@vger.kernel.org
Subject: Re: [PATCH 0/5] PCI/MSI: Generalize no_64bit_msi into msi_addr_mask
Date: Wed, 7 Jan 2026 16:15:36 +0100	[thread overview]
Message-ID: <0d76a0dc-aebd-452d-bbe3-940775a23761@amd.com> (raw)
In-Reply-To: <20251224-pci-msi-addr-mask-v1-0-05a6fcb4b4c0@iscas.ac.cn>

On 12/24/25 04:10, Vivian Wang wrote:
> The Sophgo SG2042 is a cursed machine in more ways than one.
> 
> The one way relevant to this patch series is that its PCIe controller
> has neither INTx nor a low-address MSI doorbell wired up. Instead, the
> only usable MSI doorbell is a SoC one at 0x7030010300, which is above
> 32-bit space.

Oh! That sounds like a really big show stopper for a lot of PCIe devices.

Pretty much all 32bit devices are impossible to work with that.

If I'm not completely mistaken that even makes the platform non-PCIe spec complaint.

> Currently, the no_64bit_msi flag on a PCI device declares that a device
> needs a 32-bit MSI address. Since no more precise indication is
> possible, devices supporting less than 64 bits of MSI addresses are all
> lumped into one "need 32-bit MSI address" bucket. This of course
> prevents these devices from working with MSI enabled on SG2042 because a
> 32-bit MSI doorbell address is not possible. Combined with a lack of
> INTx, some of them have trouble working on SG2042 at all.
> 
> There were previous dirtier attempts to allow overriding no_64bit_msi
> for radeon [1] and hda/intel [2].
> 
> To fix this, generalize the single bit no_64bit_msi into a full address
> mask msi_addr_mask to more precisely describe the restriction. The
> existing DMA masks seems insufficient, as for e.g. radeon the
> msi_addr_mask and coherent_dma_mask seems to be different on more recent
> devices.
> 
> The patches are structured as follows:
> 
> - Patch 1 conservatively introduces msi_addr_mask, without introducing
>   any functional changes (hopefully, if I've done everything right), by
>   only using DMA_BIT_MASK(32) and DMA_BIT_MASK(64).
> - The rest of the series actually make use of intermediate values of
>   msi_addr_mask, and should be independently appliable. Patch 2 relaxes
>   msi_verify_entries() to allow intermediate values of msi_addr_mask.
>   Patch 3 onwards raises msi_addr_mask in individual device drivers.
> 
> Tested on SG2042 with a Radeon R5 220 which makes use of radeon and
> hda/intel. PPC changes and pensanto/ionic changes are compile-tested
> only, since I do not have the hardware.
> 
> I would appreciate if driver maintainers can take a look and see whether
> the masks I've set makes sense, although I believe they shouldn't cause
> problems on existing platforms. I'm also not familiar with PPC enough to
> touch the arch/powerpc firmware calls further - help would be
> appreciated.

Over all the approach looks sane to me, but the radeon patch needs some changes.

Going to comment on the patch itself.

Regards,
Christian.

> 
> My intention is that the first two patches are taken up by PCI
> maintainers, and the rest go through the maintainers of individual
> drivers since they could use more device-specific testing and review. If
> this is not convenient I'll be happy to split it up or something.
> 
> [1]: https://lore.kernel.org/all/20251220163338.3852399-1-gaohan@iscas.ac.cn/
> [2]: https://lore.kernel.org/all/20251220170501.3972438-1-gaohan@iscas.ac.cn/
> 
> ---
> Vivian Wang (5):
>       PCI/MSI: Conservatively generalize no_64bit_msi into msi_addr_mask
>       PCI/MSI: Check msi_addr_mask in msi_verify_entries()
>       drm/radeon: Raise msi_addr_mask to 40 bits for pre-Bonaire
>       ALSA: hda/intel: Raise msi_addr_mask to dma_bits
>       [RFC net-next] net: ionic: Set msi_addr_mask to IONIC_ADDR_LEN-bit everywhere
> 
>  arch/powerpc/platforms/powernv/pci-ioda.c           |  2 +-
>  arch/powerpc/platforms/pseries/msi.c                |  4 ++--
>  drivers/gpu/drm/radeon/radeon_irq_kms.c             |  4 ++--
>  drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c |  4 +---
>  drivers/pci/msi/msi.c                               | 11 +++++++----
>  drivers/pci/msi/pcidev_msi.c                        |  2 +-
>  drivers/pci/probe.c                                 |  7 +++++++
>  include/linux/pci.h                                 |  8 +++++++-
>  sound/hda/controllers/intel.c                       | 10 +++++-----
>  9 files changed, 33 insertions(+), 19 deletions(-)
> ---
> base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
> change-id: 20251223-pci-msi-addr-mask-2d765a7eb390
> 
> Best regards,


      parent reply	other threads:[~2026-01-07 15:15 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-24  3:10 [PATCH 0/5] PCI/MSI: Generalize no_64bit_msi into msi_addr_mask Vivian Wang
2025-12-24  3:10 ` [PATCH 1/5] PCI/MSI: Conservatively generalize " Vivian Wang
2026-01-05 18:05   ` Creeley, Brett
2026-01-06  7:41     ` Vivian Wang
2025-12-24  3:10 ` [PATCH 2/5] PCI/MSI: Check msi_addr_mask in msi_verify_entries() Vivian Wang
2025-12-24  3:10 ` [PATCH 3/5] drm/radeon: Raise msi_addr_mask to 40 bits for pre-Bonaire Vivian Wang
2026-01-07 15:20   ` Christian König
2026-01-08  6:41     ` Vivian Wang
2025-12-24  3:10 ` [PATCH 4/5] ALSA: hda/intel: Raise msi_addr_mask to dma_bits Vivian Wang
2025-12-24  3:10 ` [PATCH RFC net-next 5/5] net: ionic: Set msi_addr_mask to IONIC_ADDR_LEN-bit everywhere Vivian Wang
2026-01-06 18:37   ` Creeley, Brett
2025-12-24  4:51 ` [PATCH 0/5] PCI/MSI: Generalize no_64bit_msi into msi_addr_mask Vivian Wang
2026-01-07 15:15 ` Christian König [this message]

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