From: "Michael Chan" <mchan@broadcom.com>
To: "John W. Linville" <linville@tuxdriver.com>, davem@davemloft.net
Cc: netdev@oss.sgi.com
Subject: [PATCH 2.6.12-rc2 8/11] tg3: Add nvram lock-out support for 5752 TPM
Date: Mon, 18 Apr 2005 00:54:16 -0700 [thread overview]
Message-ID: <1113810856.6504.73.camel@rh4> (raw)
In-Reply-To: <1113809864.6504.58.camel@rh4>
[-- Attachment #1: Type: text/plain, Size: 180 bytes --]
Add support for the NVRAM lock-out feature for TPM in 5752. If lock-out
is enabled, certain NVRAM registers cannot be written to.
Signed-off-by: Michael Chan <mchan@broadcom.com>
[-- Attachment #2: tg3-108.patch --]
[-- Type: text/x-patch, Size: 4231 bytes --]
diff -Nru 107/drivers/net/tg3.c 108/drivers/net/tg3.c
--- 107/drivers/net/tg3.c 2005-04-15 17:33:55.000000000 -0700
+++ 108/drivers/net/tg3.c 2005-04-15 17:48:23.000000000 -0700
@@ -3732,6 +3732,28 @@
}
/* tp->lock is held. */
+static void tg3_enable_nvram_access(struct tg3 *tp)
+{
+ if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
+ !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {
+ u32 nvaccess = tr32(NVRAM_ACCESS);
+
+ tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
+ }
+}
+
+/* tp->lock is held. */
+static void tg3_disable_nvram_access(struct tg3 *tp)
+{
+ if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
+ !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {
+ u32 nvaccess = tr32(NVRAM_ACCESS);
+
+ tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
+ }
+}
+
+/* tp->lock is held. */
static void tg3_write_sig_pre_reset(struct tg3 *tp, int kind)
{
if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X))
@@ -7102,6 +7124,10 @@
nvcfg1 = tr32(NVRAM_CFG1);
+ /* NVRAM protection for TPM */
+ if (nvcfg1 & (1 << 27))
+ tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;
+
switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ:
case FLASH_5752VENDOR_ATMEL_EEPROM_376KHZ:
@@ -7179,11 +7205,7 @@
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
tp->tg3_flags |= TG3_FLAG_NVRAM;
- if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
- u32 nvaccess = tr32(NVRAM_ACCESS);
-
- tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
- }
+ tg3_enable_nvram_access(tp);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
tg3_get_5752_nvram_info(tp);
@@ -7192,11 +7214,7 @@
tg3_get_nvram_size(tp);
- if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
- u32 nvaccess = tr32(NVRAM_ACCESS);
-
- tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
- }
+ tg3_disable_nvram_access(tp);
} else {
tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED);
@@ -7285,11 +7303,7 @@
tg3_nvram_lock(tp);
- if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
- u32 nvaccess = tr32(NVRAM_ACCESS);
-
- tw32_f(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
- }
+ tg3_enable_nvram_access(tp);
tw32(NVRAM_ADDR, offset);
ret = tg3_nvram_exec_cmd(tp, NVRAM_CMD_RD | NVRAM_CMD_GO |
@@ -7300,11 +7314,7 @@
tg3_nvram_unlock(tp);
- if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
- u32 nvaccess = tr32(NVRAM_ACCESS);
-
- tw32_f(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
- }
+ tg3_disable_nvram_access(tp);
return ret;
}
@@ -7367,7 +7377,7 @@
while (len) {
int j;
- u32 phy_addr, page_off, size, nvaccess;
+ u32 phy_addr, page_off, size;
phy_addr = offset & ~pagemask;
@@ -7390,8 +7400,7 @@
offset = offset + (pagesize - page_off);
- nvaccess = tr32(NVRAM_ACCESS);
- tw32_f(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
+ tg3_enable_nvram_access(tp);
/*
* Before we can erase the flash page, we need
@@ -7528,13 +7537,10 @@
tg3_nvram_lock(tp);
- if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
- u32 nvaccess = tr32(NVRAM_ACCESS);
-
- tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
-
+ tg3_enable_nvram_access(tp);
+ if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
+ !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM))
tw32(NVRAM_WRITE1, 0x406);
- }
grc_mode = tr32(GRC_MODE);
tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE);
@@ -7553,11 +7559,7 @@
grc_mode = tr32(GRC_MODE);
tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE);
- if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
- u32 nvaccess = tr32(NVRAM_ACCESS);
-
- tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
- }
+ tg3_disable_nvram_access(tp);
tg3_nvram_unlock(tp);
}
diff -Nru 107/drivers/net/tg3.h 108/drivers/net/tg3.h
--- 107/drivers/net/tg3.h 2005-04-15 17:33:55.000000000 -0700
+++ 108/drivers/net/tg3.h 2005-04-15 17:48:23.000000000 -0700
@@ -2122,6 +2122,7 @@
#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000
#define TG3_FLG2_5705_PLUS 0x00040000
#define TG3_FLG2_5750_PLUS 0x00080000
+#define TG3_FLG2_PROTECTED_NVRAM 0x00100000
u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3
next prev parent reply other threads:[~2005-04-18 7:54 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-04-13 23:38 [patch 2.6.12-rc2 0/10] add bcm5752 support plus some cleanup to tg3 John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 1/10] tg3: add basic bcm5752 support John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 2/10] tg3: add bcm5752 to tg3_pci_tbl John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 3/10] tg3: add bcm5752 entry to pci_ids.h John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 4/10] tg3: use TG3_FLG2_5705_PLUS instead of multi-way if's John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 5/10] tg3: define TG3_FLG2_5750_PLUS flag John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 6/10] tg3: use new " John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 7/10] tg3: more use of TG3_FLG2_5705_PLUS flag John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 8/10] tg3: use TG3_FLG2_57{05,50}_PLUS flags in tg3_get_invariants John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 9/10] tg3: check TG3_FLG2_5750_PLUS flag to set TG3_FLG2_5705_PLUS flag John W. Linville
2005-04-13 23:38 ` [patch 2.6.12-rc2 10/10] tg3: add support for bcm5752 rev a1 John W. Linville
2005-04-22 0:04 ` David S. Miller
2005-04-22 0:04 ` [patch 2.6.12-rc2 9/10] tg3: check TG3_FLG2_5750_PLUS flag to set TG3_FLG2_5705_PLUS flag David S. Miller
2005-04-22 0:03 ` [patch 2.6.12-rc2 8/10] tg3: use TG3_FLG2_57{05,50}_PLUS flags in tg3_get_invariants David S. Miller
2005-04-22 0:02 ` [patch 2.6.12-rc2 7/10] tg3: more use of TG3_FLG2_5705_PLUS flag David S. Miller
2005-04-22 0:02 ` [patch 2.6.12-rc2 6/10] tg3: use new TG3_FLG2_5750_PLUS flag David S. Miller
2005-04-22 0:01 ` [patch 2.6.12-rc2 5/10] tg3: define " David S. Miller
2005-04-22 0:00 ` [patch 2.6.12-rc2 4/10] tg3: use TG3_FLG2_5705_PLUS instead of multi-way if's David S. Miller
2005-04-21 23:59 ` [patch 2.6.12-rc2 3/10] tg3: add bcm5752 entry to pci_ids.h David S. Miller
2005-05-27 18:47 ` [patch 2.6.12-rc5] tg3: add bcm5752 entry to pci.ids John W. Linville
2005-05-27 18:53 ` Christoph Hellwig
2005-05-27 19:00 ` John W. Linville
2005-05-27 18:12 ` Michael Chan
2005-05-27 19:02 ` Christoph Hellwig
2005-05-27 19:30 ` David S. Miller
2005-05-27 19:24 ` Michael Chan
2005-05-27 20:40 ` Jeff Garzik
2005-05-27 20:41 ` David S. Miller
2005-05-27 20:40 ` David S. Miller
2005-05-27 22:46 ` Dave Jones
2005-04-21 23:58 ` [patch 2.6.12-rc2 2/10] tg3: add bcm5752 to tg3_pci_tbl David S. Miller
2005-04-21 23:57 ` [patch 2.6.12-rc2 1/10] tg3: add basic bcm5752 support David S. Miller
2005-04-18 6:42 ` [PATCH 2.6.12-rc2 0/11] tg3: Add complete support for 5752 Michael Chan
2005-04-18 6:50 ` [PATCH 2.6.12-rc2 1/11] tg3: Minor 5752 fixes Michael Chan
2005-04-18 7:08 ` [PATCH 2.6.12-rc2 2/11] tg3: Split tg3_phy_probe into 2 functions Michael Chan
2005-04-18 7:22 ` [PATCH 2.6.12-rc2 3/11] tg3: Setup proper GPIO settings Michael Chan
2005-04-18 7:28 ` [PATCH 2.6.12-rc2 4/11] tg3: Fix tg3_set_power_state() Michael Chan
2005-04-18 7:37 ` [PATCH 2.6.12-rc2 5/11] tg3: Workaround 5752 A0 chip ID Michael Chan
2005-04-18 7:47 ` [PATCH 2.6.12-rc2 7/11] tg3: Add nvram detection for 5752 Michael Chan
2005-04-18 7:54 ` Michael Chan [this message]
2005-04-18 7:57 ` [PATCH 2.6.12-rc2 9/11] tg3: Fix bug in tg3_set_eeprom() Michael Chan
2005-04-18 7:59 ` [PATCH 2.6.12-rc2 10/11] tg3: Add msi support Michael Chan
2005-04-18 8:02 ` [PATCH 2.6.12-rc2 11/11] tg3: Add msi test Michael Chan
2005-04-18 7:41 ` [PATCH 2.6.12-rc2 6/11] tg3: Add GPIO3 for 5752 Michael Chan
2005-04-22 0:15 ` [PATCH 2.6.12-rc2 0/11] tg3: Add complete support " David S. Miller
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