From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Michael Chan" <mchan@broadcom.com>
Subject: Re: RFC: NAPI packet weighting patch
Date: Fri, 03 Jun 2005 17:25:36 -0700
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Cc: "Lennert Buytenhek" <buytenh@wantstofly.org>,
        "David S. Miller" <davem@davemloft.net>, mitch.a.williams@intel.com,
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On Fri, 2005-06-03 at 18:29 -0400, jamal wrote:
> On Fri, 2005-03-06 at 13:35 -0700, Michael Chan wrote:
> 
> > By the way, in tg3 there is a buffer replenishment threshold programmed
> > to the chip and is currently set at rx_pending / 8 (200/8 = 25). This
> > means that the chip will replenish 25 rx buffers at a time.
> > 
> 
> So when you write the MMIO, 25 buffers are replenished or is this auto
> magically happening in the background? Sounds like a neat feature either
> way.
> 
The MMIO writes a cumulative producer index of new rx descriptors in the
ring. As the chip requires new buffers for rx packets, it will DMA 25 of
these rx descriptors at a time up to the producer index.