From: "Michael Chan" <mchan@broadcom.com>
To: "David S. Miller" <davem@davemloft.net>
Cc: netdev@vger.kernel.org
Subject: Re: tw32_f() in tg3_write_mem()
Date: Mon, 01 May 2006 07:53:04 -0700 [thread overview]
Message-ID: <1146495184.4780.33.camel@rh4> (raw)
In-Reply-To: <20060430.230719.90327967.davem@davemloft.net>
On Sun, 2006-04-30 at 23:07 -0700, David S. Miller wrote:
> From: "Michael Chan" <mchan@broadcom.com>
> Date: Sun, 30 Apr 2006 22:05:40 -0700
>
> > Reading back the data register is a safe thing to do. This
> > guarantees that the data is written before we change the address
> > register to the zero value. Without the read, there is a danger of
> > the value being written to SRAM address 0 instead of the desired
> > address.
>
> Writes can be posted, but they cannot be reordered can they?
>
Right, reordering is not allowed unless the relaxed ordering attribute
is set. The read back here is not to guarantee ordering. Those SRAM
address and data registers require "set-up" times for the SRAM writes
and reads to work correctly. The "set-up" times are met either with
config. cycles or with a read when using MMIO cycles. No udelays are
needed, just a read will do.
next prev parent reply other threads:[~2006-05-01 16:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-01 5:05 tw32_f() in tg3_write_mem() Michael Chan
2006-05-01 6:07 ` David S. Miller
2006-05-01 14:53 ` Michael Chan [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-04-30 2:22 David S. Miller
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