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* Re: [PATCH 4/5] Correct initial and close hardware step.
  2006-10-02 18:26 [PATCH 4/5] Correct initial and close hardware step Jesse Huang
@ 2006-10-02  6:56 ` Andrew Morton
  0 siblings, 0 replies; 3+ messages in thread
From: Andrew Morton @ 2006-10-02  6:56 UTC (permalink / raw)
  To: Jesse Huang; +Cc: linux-kernel, netdev, jgarzik

On Mon, 02 Oct 2006 14:26:00 -0400
Jesse Huang <jesse@icplus.com.tw> wrote:

> Correct initial and close hardware step.

Please provide a description of what was wrong with it, and how this
patch fixes it, thanks.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 4/5] Correct initial and close hardware step.
@ 2006-10-02 18:26 Jesse Huang
  2006-10-02  6:56 ` Andrew Morton
  0 siblings, 1 reply; 3+ messages in thread
From: Jesse Huang @ 2006-10-02 18:26 UTC (permalink / raw)
  To: linux-kernel, netdev, akpm, jgarzik, jesse

From: Jesse Huang <jesse@icplus.com.tw>

Change Logs:
Correct initial and close hardware step.

Signed-off-by: Jesse Huang <jesse@icplus.com.tw>
---

 drivers/net/sundance.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

1bbb3f6231fa1f52a9f61e299f22610d357f6041
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index 679eda4..14b4933 100755
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -789,6 +789,7 @@ static int netdev_open(struct net_device
 {
 	struct netdev_private *np = netdev_priv(dev);
 	void __iomem *ioaddr = np->base;
+	unsigned long flags;
 	int i;
 
 	/* Do we need to reset the chip??? */
@@ -833,6 +834,10 @@ #endif
 		iowrite8(0x01, ioaddr + DebugCtrl1);
 	netif_start_queue(dev);
 
+	spin_lock_irqsave(&np->lock, flags);
+	reset_tx(dev);
+	spin_unlock_irqrestore(&np->lock, flags);
+
 	iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
 
 	if (netif_msg_ifup(np))
@@ -1652,6 +1657,9 @@ static int netdev_close(struct net_devic
 	/* Disable interrupts by clearing the interrupt mask. */
 	iowrite16(0x0000, ioaddr + IntrEnable);
 
+	/* Disable Rx and Tx DMA for safely release resource */
+	iowrite32(0x500, ioaddr + DMACtrl);
+
 	/* Stop the chip's Tx and Rx processes. */
 	iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1);
 
-- 
1.3.GIT




^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 4/5] Correct initial and close hardware step.
@ 2006-10-14 19:57 Jesse Huang
  0 siblings, 0 replies; 3+ messages in thread
From: Jesse Huang @ 2006-10-14 19:57 UTC (permalink / raw)
  To: linux-kernel, netdev, akpm, jgarzik, jesse

From: Jesse Huang <jesse@icplus.com.tw>

Change Logs:
Correct initial and close hardware step. In some embedded system down and up
IP100A will cause DMA crash. We add some for safe down and up IP100A.

Signed-off-by: Jesse Huang <jesse@icplus.com.tw>
---

 drivers/net/sundance.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

1bbb3f6231fa1f52a9f61e299f22610d357f6041
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index 679eda4..14b4933 100755
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -789,6 +789,7 @@ static int netdev_open(struct net_device
 {
 	struct netdev_private *np = netdev_priv(dev);
 	void __iomem *ioaddr = np->base;
+	unsigned long flags;
 	int i;
 
 	/* Do we need to reset the chip??? */
@@ -833,6 +834,10 @@ #endif
 		iowrite8(0x01, ioaddr + DebugCtrl1);
 	netif_start_queue(dev);
 
+	spin_lock_irqsave(&np->lock, flags);
+	reset_tx(dev);
+	spin_unlock_irqrestore(&np->lock, flags);
+
 	iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
 
 	if (netif_msg_ifup(np))
@@ -1652,6 +1657,9 @@ static int netdev_close(struct net_devic
 	/* Disable interrupts by clearing the interrupt mask. */
 	iowrite16(0x0000, ioaddr + IntrEnable);
 
+	/* Disable Rx and Tx DMA for safely release resource */
+	iowrite32(0x500, ioaddr + DMACtrl);
+
 	/* Stop the chip's Tx and Rx processes. */
 	iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1);
 
-- 
1.3.GIT




^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2006-10-14  8:12 UTC | newest]

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